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A4987SESTR-T Datasheet(PDF) 1 Page - Allegro MicroSystems |
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A4987SESTR-T Datasheet(HTML) 1 Page - Allegro MicroSystems |
1 / 16 page Features and Benefits ▪ Low RDS(ON) outputs ▪ Internal mixed current decay mode ▪ Synchronous rectification for low power dissipation ▪ Internal UVLO ▪ Crossover-current protection ▪ 3.3 and 5 V compatible logic supply ▪ Thin profile QFN and TSSOP packages ▪ Thermal shutdown circuitry ▪ Short-to-ground protection ▪ Shorted load protection ▪ Low current Sleep mode, < 10 μA Packages: Description The A4987 is a dual DMOS full-bridge stepper motor driver with parallel input communication and overcurrent protection. Each full-bridge output is rated up to 35 V and ±1A. TheA4987 includes fixed off-time pulse width modulation (PWM) current regulators, along with 2- bit nonlinear DACs (digital-to-analog converters) that allow stepper motors to be controlled in full, half, and quarter steps. The PWM current regulator uses the Allegro® patented mixed decay mode for reduced audible motor noise, increased step accuracy, and reduced power dissipation. Internal synchronous rectification control circuitry is provided to improve power dissipation during PWM operation. The outputs are protected from shorted load and short-to- ground events, which protect the driver and associated circuitry from thermal damage or flare-ups. Other protection features includethermalshutdownwithhysteresis,undervoltagelockout (UVLO) and crossover current protection. Special power-up sequencing is not required. TheA4987 is supplied in two packages, a 24-contact QFN (ES) and a 24-pinTSSOP(LP). Both packages have exposed thermal pads for enhanced thermal performance. The 24-contact ES is 4 mm × 4 mm, with a nominal overall package height of 0.75 mm. The 24-pin LP is a TSSOP with 0.65 pitch and an overall package height of ≤1.2 mm. Both packages are lead (Pb) free, with 100% matte tin leadframe plating. 4987-DS DMOS Dual Full-Bridge PWM Motor Driver with Overcurrent Protection A4987 Approximate size 24-contact QFN with exposed thermal pad 4 mm × 4 mm × 0.75 mm (ES package) 24-pin TSSOP with exposed thermal pad (LP Package) Typical Application Diagram Microcontroller or Controller Logic V DD VREF GND GND PH2 IN12 SLEEP IN11 PH1 IN02 IN01 VBB1 CP1 VCP VREG VDD ROSC 0.22 μF 0.22 μF 0.1 μF0.1 μF 100 μF CP2 VBB2 OUT1A OUT1B SENSE1 OUT2A OUT2B SENSE2 A4987 |
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