WM2627

Production Data

WOLFSON MICROELECTRONICS LTD

PD Rev 1.0 April 2001

2

PIN CONFIGURATION

12

11

10

16

15

14

13

5

6

7

1

2

3

4

REFINCD

OUTD

OUTC

OUTB

OUTA

AVDD

REFINAB

FS

NCS

SCLK

DIN

NLDAC

DVDD

NPD

8

DGND

9

AGND

PIN DESCRIPTION

PIN NO

NAME

TYPE

DESCRIPTION

1

DVDD

Supply

Digital supply.

2

NPD

Digital input

Power down. Powers down all DACs overriding their individual power

down settings and all output stages. This pin is active low.

3

NLDAC

Digital input

Load DAC. Digital input active low. NLDAC must be taken low to update

the DAC latch from the holding latches.

4

DIN

Digital input

Serial data input.

5

SCLK

Digital input

Serial clock input.

6

NCS

Digital input

Chip select. This pin is active low.

7

FS

Digital input

Frame synchronisation for serial input data.

8

DGND

Ground

Digital ground.

9

AGND

Ground

Analogue ground.

10

REFINCD

Analogue input

Voltage reference input for DACs C and D.

11

OUTD

Analogue output

DAC D output.

12

OUTC

Analogue output

DAC C output.

13

OUTB

Analogue output

DAC B output.

14

OUTA

Analogue output

DAC A output.

15

REFINAB

Analogue input

Voltage reference input for DACs A and B.

16

AVDD

Supply

Analogue supply.