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BU9883FV-W Datasheet(PDF) 3 Page - Rohm |
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BU9883FV-W Datasheet(HTML) 3 Page - Rohm |
3 / 19 page 3/18 ● EEPROM AC operating characteristics (Ta=-40~85℃, Vcc0~3 = 3.0~5.5V) Parameter Symbol 3.0≦Vcc0~3≦5.5V Unit Min. Typ. Max. Min. Clock Frequency fSCL - - 400 kHz Data Clock High Period tHIGH 0.6 - - μs Data Clock Low Period tLOW 1.2 - - μs SDA0~3 and SCL0~3 Rise Time *1 tR - - 0.3 μs SDA0~3 and SCL0~3 Fall Time *1 tF - - 0.3 μs Start Condition Hold Time tHD:STA 0.6 - - μs Start Condition Setup Time tSU:STA 0.6 - - μs Input Data Hold Time tHD:DAT 0 - - ns Input Data Setup Time tSU:DAT 100 - - ns Output Data Delay Time tPD 0.1 - 0.9 μs Output Data Hold Time tDH 0.1 - - μs Stop Condition Setup Time tSU:STO 0.6 - - μs Bus Free Time tBUF 1.2 - - μs Write Cycle Time tWR - - 5 ms Noise Spike Width (SDA 0~3 and SCL0~3) tI - - 0.1 μs WP Hold Time tHD:WP 0 - - ns WP Setup Time tSU:WP 0.1 - - μs WP valid time tHIGH:WP 1.0 - - μs ● Synchronous data input/output timing ○SDA data is latched into the chip at the rising edge of the SCL clock. (This is commoness in all port.) ○Output date toggles at the falling edge of the SCL clock. (This is commoness in all port.) ● Characteristic data (The following values are Typ. ones). SDA (IN) SCL SDA (OUT) tHD:STA tHD:DAT tSU:DAT tBUF tPD tDH tLOW tHIGH tR tF Fig.-1 SYNCHRONOUS DATA TIMING SDA SCL tSU:STA tSU:STO tHD:STA START BIT STOP BIT *1 : Not 100% TESETED 0 1 2 3 4 5 6 01 23 4 5 6 SUPPLY VOLTAGE : Vcc3[V] Ta=-40℃ Ta=25℃ Ta=85℃ SPEC 0 1 2 3 4 5 6 01 234 56 SUPPLY VOLTAGE : Vcc0[V] Ta=-40℃ Ta=25℃ Ta=85℃ SPEC 0 1 2 3 4 5 6 012 345 6 SUPPLY VOLTAGE : Vcc0[V] Ta=-40℃ Ta=25℃ Ta=85℃ SPEC Fig.6 'L' Input Voltage0 VIL0 (SCL0,SDA0) 0 1 2 3 4 5 6 01 2 3 4 5 6 SUPPLY VOLTAGE : Vcc0[V] Ta=-40℃ Ta=25℃ Ta=85℃ SPEC 0 1 2 3 4 5 6 01 2 3 4 5 6 SUPPLY VOLTAGE : Vcc2[V] Ta=-40℃ Ta=25℃ Ta=85℃ SPEC 0 1 2 3 4 5 6 012 3 456 SUPPLY VOLTAGE : Vcc1[V] Ta=-40℃ Ta=25℃ Ta=85℃ SPEC Fig.2 'H' Input Voltage0 VIH0 (SCL0,SDA0) Fig.3 'H' Input Voltage1 VIH1 (SCL1,SDA1) Fig.4 'H' Input Voltage2 VIH2 (SCL2,SDA2) Fig.5 'H' Input Voltage3 VIH3 (SCL3,SDA3) Fig.7 'L' Input Voltage1 VIL 1 (SCL1,SDA1) |
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