Electronic Components Datasheet Search |
|
BU9795AFV Datasheet(PDF) 8 Page - Rohm |
|
BU9795AFV Datasheet(HTML) 8 Page - Rohm |
8 / 16 page Technical Note 8/15 BU9795AKV, BU9795AFV, BU9795AGUW www.rohm.com 2009.07 - Rev.B © 2009 ROHM Co., Ltd. All rights reserved. ○ Display control (DISCTL) MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 C 0 1 P4 P3 P2 P1 P0 Set Frame frequency Setting P4 P3 Reset initialize condition 80Hz 0 0 ○ 71Hz 0 1 64Hz 1 0 53Hz 1 1 Set LCD drive waveform Setting P2 Reset initialize condition Line inversion 0 ○ Frame inversion 1 Set Power save mode Setting P1 P0 Reset initialize condition Power save mode 1 0 0 Power save mode 2 0 1 Normal mode 1 0 ○ High power mode 1 1 * VDD-VLCD>=3.0V is required for High power mode. ○ Set IC Operation (ICSET) MSB D7 D6 D5 D4 D3 D2 D1 LSB D0 C 1 1 0 1 P2 P1 P0 P2: MSB data of DDRAM address. Please refer to “ADSET” command. Setting P2 Reset initialize condition Address MSB‘0’ 0 ○ Address MSB‘1’ 1 Set Software Reset condition Setting P1 No operation 0 Software Reset 1 Switch between internal clock and external clock. Setting P0 Reset initialize condition Internal clock 0 ○ External clock input 1 |
Similar Part No. - BU9795AFV |
|
Similar Description - BU9795AFV |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |