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BU7839GVW Datasheet(PDF) 8 Page - Rohm |
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BU7839GVW Datasheet(HTML) 8 Page - Rohm |
8 / 16 page 8 / 15 ● DC characteristic Ta=25degree,DVDD=DVDDIO=1.5V, VDD_R=VDD_L=PLLVDD=2.8V Item Symbol Standardized values Unit Note MIN TYP MAX Input ’H’ Level VIH 0.7x DVDDIO - - V Input ’L’ Level VIL - - 0.3x DVDDIO V Output ’H’ Level VOH 0.8x DVDDIO - - V Io=-1mA Output ’L’ Level 1 VOL1 - - 0.2x DVDDIO V Io=1mA Output ’L’ Level 2 (SDA terminal) VOL2 - - 0.2x DVDDIO V Io=3mA Table 10 DC characteristic ●2wire CPU I/F Part Device address is "0110011"(33h) or "0110110"(36h), i.e. 33h when ADR terminal is L or 36h when ADR terminal is H. Please don’t switch the ADR terminal while 2wire CPU I/F is operating. The transmission rate is compatible with a maximum of 400kbps ADR 2wire CPU I/F device address W/R A7 A6 A5 A4 A3 A2 A1 0 0 1 1 0 0 1 1 0/1 1 0 1 1 0 1 1 0 0/1 ● Bit transmission The data of 1bit is transmitted while SCL is H. In case of bit transmission, the signal transition of SDA can not be implemented while SCL is H. If SDA changes while SCL is H, START condition or STOP condition is generated, it is interpreted as control signal. ● START condition/STOP condition Data transmission on bus is not implemented while SDA and SCL are H. At this time, if SCL remains to be H and SDA is transited from H to L, then the START condition (S) is attained and so the access is started, and if SCL remains to be H and SDA is transited from L to H, then the STOP condition (P) is attained and so the access is terminated, which is shown below. This device accepts the continuous START condition and the continuous STOP condition. SDA SCL SDA 安定状態: データ有効 SDA 変化 可能 SDA SCL S P START 条件 STOP 条件 SDA stable state: Data is effective SDA change is Possible START condition STOP condition |
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