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MAX8643AETV+ Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX8643AETV+ Datasheet(HTML) 7 Page - Maxim Integrated Products |
7 / 16 page 3A, 2MHz Step-Down Regulator with Integrated Switches _______________________________________________________________________________________ 7 Pin Description PIN NAME FUNCTION 1 PREBIAS Leave pin unconnected to prevent discharging of output capacitor during soft-start. Connect to GND otherwise. (See the Soft-Starting into a Prebiased Output section.) 2VDD Supply Voltage and Bypass Input. Connect VDD to IN with a 10 Ω resistor. Connect a 1µF ceramic capacitor from VDD to GND. 3, 4 CTL1, CTL2 Preset Output Voltage Selection Input. CTL1 and CTL2 set the output voltage to one of nine preset voltages. See Table 1 for preset voltages. 5 REFIN External Reference Input. Connect REFIN to SS to use the internal 0.6V reference. Connecting REFIN to an external reference voltage forces FB to regulate the voltage applied to REFIN. REFIN is internally pulled to GND when the IC is in shutdown mode. 6SS Soft-Start Input. Connect a capacitor from SS to GND to set the startup time. See the Soft-Start and REFIN section for details on setting the soft-start time. 7 GND Analog Circuit Ground 8 COMP Output of the Voltage-Error Amplifier. Connect the necessary compensation network from COMP to FB. COMP is internally pulled to GND when the IC is in shutdown mode. 9FB Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND to set the output voltage from 0.6V to 90% of VIN. Connect FB through an RC network to the output when using CTL1 and CTL2 to select any of nine preset voltages. 10 OUT Output Voltage Sense. Connect to the output. Leave OUT unconnected when an external resistor-divider is used. 11 FREQ Oscillator Frequency Selection. Connect a resistor from FREQ to GND to select the switching frequency. 12 PWRGD Power-Good Output. Open-drain output that is high impedance when VFB ≥ 90% of VREFIN or 0.6V. PWRGD is internally pulled low when VFB falls below 90% of its regulation point. PWRGD is internally pulled low when the IC is in shutdown mode, VDD or VIN is below the UVLO threshold, or the IC is in thermal shutdown. 13 BST High-Side MOSFET Driver Supply. Bypass BST to LX with a 0.1µF capacitor. 14, 15, 16 LX Inductor Connection. All LX pins are internally connected together. Connect all LX pins to the output inductor. LX is high impedance when the IC is in shutdown mode. 17–20 PGND Power Ground. Connect all PGND pins externally to the power ground plane. 21, 22, 23 IN Power-Supply Input. Input supply range is from 2.35V to 3.6V. Bypass with 22µF ceramic capacitance to PGND externally. See the Typical Application Circuit. 24 EN Enable Input. Logic input to enable/disable the MAX8643A. — EP Exposed Paddle. Connect to a large ground plane to optimize thermal performance. |
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