DS4625P+156 datasheet(3/7 Pages) MAXIM

Part #	DS4625P+156

Description	3.3V Dual-Output LVPECL Clock Oscillator

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Manufacturer	MAXIM [Maxim Integrated Products]

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3.3V Dual-Output LVPECL Clock Oscillator

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3

Note 2: Limits at -40°C are guaranteed by design and are not production tested.

Note 3: AC parameters are guaranteed by design and not production tested.

Note 4: Startup time is from VCC = VCCMIN until PLL locks to the crystal oscillator output.

Note 5: Frequency stability is calculated as:

ΔfTOTAL = ΔfTEMP + ΔfVCC x (3.3 x 10%) + ΔfLOAD + ΔfAGING.

Note 6: Supply-induced jitter is the deterministic jitter as measured on a LeCroy SDA11000 measured with a 50mVP-P sine wave

forced on VCC.

SINGLE-SIDEBAND PHASE NOISE

SSB PHASE NOISE (dBc/Hz) (TYPICAL, +25°C, +3.3V)

OFFSET

fC = 100MHz

fC = 125MHz

fC = 150MHz

fC = 156.25MHz

fC = 200MHz

UNITS

100Hz

-71

-85

-84

-79

-85

1kHz

-116

-117

-116

-115

-113

10kHz

-119

-118

-116

-117

-113

100kHz

-126

-125

-122

-123

-120

1MHz

-143

-142

-141

-140

-139

10MHz

-151

-149

-148

-149

20MHz

-151

-150

-149

-150

dBc/Hz

ELECTRICAL CHARACTERISTICS (continued)

(VCC = +2.97V to +3.63V, TA = -40°C to +85°C, typical values are at VCC = +3.3V and TA = +25°C, unless otherwise noted.) (Notes 2, 3)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Output High Voltage

VOH

Output connected to 50

at PECL_BIAS at

VCC - 2.0V

VCC -

1.085

VCC -

0.88

V

Output Low Voltage

VOL

Output connected to 50

at PECL_BIAS at

VCC - 2.0V

VCC -

1.825

VCC -

1.62

V

Differential Output Voltage

|VOD|

Output connected to 50

at PECL_BIAS at

VCC - 2.0V

0.595

0.710

V

Output Rise Time

tR

20% to 80%

200

ps

Output Fall Time

tF

80% to 20%

200

ps

Duty Cycle

DCYCLE

45

55

%

Propagation Delay from OE

Going Low to Output High

Impedance

tPAZ

(See Figure 2)

100

ns

Propagation Delay from OE

Going High to Output Active

tPZA

(See Figure 2)

100

ns

Jitter

JRMS

Integrated phase RMS, 12kHz to 20MHz,

VCC = +3.3V, TA = +25°C

0.7

ps

Accumulated Deterministic

Jitter Due to Reference Spurs

125.00MHz output, VCC = +3.3V,

TA = +25°C

0.1

ps

10kHz

12.9

ps

100kHz

26.3

ps

200kHz

20.1

ps

Accumulated Deterministic

Jitter Due to Power-Supply Noise

(P-P) (Note 6)

1MHz

6.4

ps

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