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VG26S17400FJ-6 Datasheet(PDF) 7 Page - Vanguard International Semiconductor |
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VG26S17400FJ-6 Datasheet(HTML) 7 Page - Vanguard International Semiconductor |
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7 / 25 page  Document : Rev. Page 7 VIS VG26(V)(S)17400FJ 4,194,304 x 4 - Bit CMOS Dynamic RAM DC Characteristics ; 5 - Volt Version (cont.) (Ta = 0 to 70°C, VCC = + 5V 10%, Vss = 0V) Notes : 1. lCC is specified as an average current. It depends on output loading condition and cycle rate when the device is selected. lCC max is specified at the output open condition. 2. Address can be changed once or less while RAS = VIL. 3. For lCC4, address can be changed once or less within one Fast page mode cycle time. Parameter Symbol Test Conditions VG26 (V) (S) 17400E Unit Notes -5 -6 Min Max Min Max lnput leakage current ILI + 0.5V -5 5 -5 5 Output leakage current ILO + 0.5V Dout = Disable -5 5 -5 5 Output high voltage VOH lOH = -5mA 2.4 - 2.4 - V Output low voltage VOL lOL = + 4.2mA - 0.4 - 0.4 V ± 0V Vin V CC ≤ ≤ µA 0V Vout V C C ≤ ≤ µA |
Similar Part No. - VG26S17400FJ-6 |
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Similar Description - VG26S17400FJ-6 |
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