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HY5DV281622DTP Datasheet(PDF) 3 Page - Hynix Semiconductor

Part # HY5DV281622DTP
Description  128M(8Mx16) GDDR SDRAM
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HY5DV281622DTP Datasheet(HTML) 3 Page - Hynix Semiconductor

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HY5DV281622DTP
Rev. 0.2 / Sep. 2003
3
DESCRIPTION
The Hynix HY5DV281622 is a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the
point-to-point applications which requires high bandwidth.
The Hynix 8Mx16 DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the
clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data,
Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are inter-
nally pipelined and 2-bit prefetched to achieve very high bandwidth. All input and output voltage levels are compatible
with SSTL_2.
FEATURES
•3.3V for VDD and 2.5V for VDDQ power supply
All inputs and outputs are compatible with SSTL_2
interface
JEDEC standard 400mil 66pin TSOP-II with 0.65mm
pin pitch
Fully differential clock inputs (CK, /CK) operation
Double data rate interface
Source synchronous - data transaction aligned to
bidirectional data strobe (DQS)
x16 device has 2 bytewide data strobes (LDQS,
UDQS) per each x8 I/O
Data outputs on DQS edges when read (edged DQ)
Data inputs on DQS centers when write (centered
DQ)
Data(DQ) and Write masks(DM) latched on the both
rising and falling edges of the data strobe
All addresses and control inputs except Data, Data
strobes and Data masks latched on the rising edges
of the clock
Write mask byte controls by LDM and UDM
Programmable /CAS latency 3 / 4 supported
Programmable Burst Length 2 / 4 / 8 with both
sequential and interleave mode
Internal 4 bank operations with single pulsed /RAS
tRAS Lock-Out function supported
Auto refresh and self refresh supported
4096 refresh cycles / 32ms
Full, Half and Matched Impedance(Weak) strength
driver option controlled by EMRS
ORDERING INFORMATION
Note) Hynix supports Pb free parts for each speed grade with same specification, except Pb free material
We'll add "P" character after "T" for Pb free product. For example, the part number of 300MHz Pb free product is
HY5DV281622DTP-33.
Part No.
Power Supply
Clock
Frequency
Max Data Rate
interface
Package
HY5DV281622DTP-33
VDD=3.3V
VDDQ=2.5V
300MHz
600Mbps/pin
SSTL-2
400mil 66pin
TSOP-II
HY5DV281622DTP-36
275MHz
550Mbps/pin
HY5DV281622DTP-4
250MHz
500Mbps/pin
HY5DV281622DTP-5
200MHz
400Mbps/pin
HY5DV281622DTP-6
166MHz
333Mbps/pin


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