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H57V1262GTR-70X Datasheet(PDF) 9 Page - Hynix Semiconductor |
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H57V1262GTR-70X Datasheet(HTML) 9 Page - Hynix Semiconductor |
9 / 13 page Rev. 1.0 / Aug. 2009 9 Synchronous DRAM Memory 128Mbit (8Mx16bit) H57V1262GTR Series DC CHARACTERISTICS II (Commercial: TA = 0oC to 70oC, Industrial: TA = -40oC to 85oC) Note: 1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open 2. Min. of tRRC (Refresh RAS cycle time) is shown at AC CHARACTERISTICS II 3. H57V1262GTR-XXC Series: Normal Power H57V1262GTR-XXL Series: Low Power Parameter Symbol Test Condition Speed (MHz) Unit Note 200 166 143 133 Operating Current IDD1 Burst length=1, One bank active tRC ≥ tRC(min), IOL=0mA 100 80 70 70 mA 1 Precharge Standby Current in Power Down Mode IDD2P CKE ≤ VIL(max), tCK = 15ns 2 mA IDD2PS CKE ≤ VIL(max), tCK = ∞ 2mA Precharge Standby Current in Non Power Down Mode IDD2N CKE ≥ VIH(min), CS ≥ VIH(min), tCK = 15ns Input signals are changed one time dur- ing 2clks. All other pins ≥ VDD-0.2V or ≤ 0.2V 18 mA IDD2NS CKE ≥ VIH(min), tCK = ∞ Input signals are stable. 15 Active Standby Current in Power Down Mode IDD3P CKE ≤ VIL(max), tCK = 15ns 5 mA IDD3PS CKE ≤ VIL(max), tCK = ∞ 5 Active Standby Current in Non Power Down Mode IDD3N CKE ≥ VIH(min), CS ≥ VIH(min), tCK = 15ns Input signals are changed one time dur- ing 2clks. All other pins ≥ VDD-0.2V or ≤ 0.2V 40 mA IDD3NS CKE ≥ VIH(min), tCK = ∞ Input signals are stable. 35 Burst Mode Operating Cur- rent IDD4 tCK ≥ tCK(min), IOL=0mA All banks active 120 100 100 100 mA 1 Auto Refresh Current IDD5 tRC ≥ tRC(min), All banks active 210 200 190 190 mA 2 Self Refresh Current IDD6 CKE ≤ 0.2V Normal 2 mA 3 Low power 800 uA |
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