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HMC765LP6CE Datasheet(PDF) 2 Page - Hittite Microwave Corporation |
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HMC765LP6CE Datasheet(HTML) 2 Page - Hittite Microwave Corporation |
2 / 14 page For price, delivery, and to place orders, please contact Hittite Microwave Corporation: 20 Alpha Road, Chelmsford, MA 01824 Phone: 978-250-3343 Fax: 978-250-3373 Order On-line at www.hittite.com 6 6 - 17 General Description The HMC765LP6CE is a fully functioned Fractional-N Phase-Locked-Loop (PLL) Frequency Synthesizer with an Integrated Voltage Controlled Oscillator (VCO). The input reference frequency range is 100 kHz to 220 MHz while the advanced delta-sigma modulator design in the fractional synthesizer allows both ultra-fine step sizes and very low spurious products. The highly integrated structure provides excellent phase noise performance over temperature, shock and process. The HMC765LP6CE is packaged in a leadless QFN 6x6 mm surface mount package. The output power is 13 dBm typical, making the HMC765LP6CE ideal for driving the LO port of many of Hittite’s Hi Linearity and I/Q mixer products. For theory of operation and register map refer to the “PLLs w/ Integrated VCO - Microwave VCOs” Operating Guide. To view the Operating Guide, please visit www.hittite.com and choose HMC765LP6CE from the “Search by Part Number” pull down menu. HMC765LP6CE v02.0110 FRACTIONAL-N SYNTHESIZER WITH INTEGRATED VCO, 7.8 - 8.8 GHz Parameter Condition Min. Typ. Max. Units RF Output Characteristics VCO Output Frequency Range 7.8 8.3 8.8 GHz VCO Output Power 10 15 dBm VCO Tuning Voltage 213 V VCO Tuning Sensitivity V TUNE = +5V 150 MHz/V Frequency Pulling (into a 2:1 VSWR) 5MHz pp Frequency Pushing V TUNE = +5V 10 MHz/V Frequency Drift Rate 0.9 MHz/ °C Sub Harmonic (1/2) 35 dBc Harmonic (2nd) 10 dBc Harmonic (3rd) 32 dBc VCO SSB Phase Noise @ 100 kHz Offset (Open Loop) V TUNE = +5V Fvco = 8.3 GHz -115 dBc/Hz Synthesizer In-Band SSB Phase Noise @ 10 kHz Offset (Frac/Int) Fref = 50 MHz Fvco = 8.3 GHz Loop BW = 100 kHz -97 / -101 dBc/Hz Synthesizer Normalized In-Band SSB Phase Noise Floor (Frac/Int) -221 / -226 dBc/Hz Synthesizer Fractional Spurs [1] -65 dBc Synthesizer Frequency Settling Time (100 MHz Step) From 8.3 GHz to 8.4 GHz Loop BW = 100 kHz 110 us 16-Bit Divider Range (Int) N Divider Ratio 2 16+31 32 65567 16-Bit Divider Range (Frac) N Divider Ratio 2 16-1 36 65535 REF Input Characteristics Max Ref Input Frequency (3.3V) 200 225 MHz Min Ref Input Frequency 100 200 kHz Ref Input Sensitivity AC Coupled 500 700 mV pp Max Ref Input DC Coupled 0 VDDIO V Ref Input Capacitance 5 pF 14-Bit Ref Divider Range 16383 1 Electrical Specifications, T A = +25° C; VCCVCO, VDDCP, VCCCP = +5V; AVCC, VCCPS VDDPFD, AVDD, RVDD, DVDD, DVDDM, DVDDQ, VDDIO = +3.3V; AGND = DGND = 0V [1] Actual spur level is dependent on loop parameters and will increase at division ratios closest to integer boundaries. Number listed is average value. |
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