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HYMP512P72CP4-E3 Datasheet(PDF) 10 Page - Hynix Semiconductor

Part # HYMP512P72CP4-E3
Description  240pin Registered DDR2 SDRAM DIMMs based on 512 Mb C ver.
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HYMP512P72CP4-E3 Datasheet(HTML) 10 Page - Hynix Semiconductor

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Rev. 0.2 / Sep. 2008
10
1
240pin Registered DDR2 SDRAM DIMMs
ABSOLUTE MAXIMUM RATINGS
Note:
1. Stress greater than those listed may cause permanent damage to the device. This is a stress rating only, and device
functional operation at or above the conditions indicated is not implied. Expousure to absolute maximum rating con
ditions for extended periods may affect reliablility.
OPERATING CONDITIONS
Note:
1. Up to 9850 ft.
2. If the DRAM case temperature is Above 85oC, the Auto-Refresh command interval has to be reduced to
tREFI=3.9us. For Measurement conditions of TCASE, please refer to the JEDEC document JESD51-2.
DC OPERATING CONDITIONS (SSTL_1.8)
Note:
1. VDDQ must be less than or equal to VDD.
2. Peak to peak ac noise on VREF may not exceed +/-2% VREF(dc)
3. VTT of transmitting device must track VREF of receiving device.
Parameter
Symbol
Value
Unit
Note
Voltage on VDD pin relative to Vss
VDD
- 1.0 V ~ 2.3 V
V
1
Voltage on VDDL pin relative to Vss
VDDL
-0.5V ~ 2.3 V
V
1
Voltage on VDDQ pin relative to Vss
VDDQ
- 0.5 V ~ 2.3 V
V
1
Voltage on any pin relative to Vss
VIN, VOUT
- 0.5 V ~ 2.3 V
V
1
Storage Temperature
TSTG
-50 ~ +100
oC
1
Storage Humidity (without condensation)
HSTG
5 to 95
%
1
Parameter
Symbol
Rating
Units
Notes
DIMM Operating temperature (ambient)
TOPR
0 ~ +55
oC
DIMM Barometric Pressure (operating & storage)
PBAR
105 to 69
K Pascal
1
DRAM Component Case Temperature Range
TCASE
0 ~+95
oC
2
Parameter
Symbol
Min
Max
Unit
Note
Power Supply Voltage
VDD
1.7
1.9
V
VDDL
1.7
1.9
V
VDDQ
1.7
1.9
V
1
Input Reference Voltage
VREF
0.49 x VDDQ
0.51 x VDDQ
V2
EEPROM Supply Voltage
VDDSPD
1.7
3.6
V
Termination Voltage
VTT
VREF-0.04
VREF+0.04
V3
Input leakage current; any input 0V VIN VDD;
all other balls not under test = 0V)
II
-2
2
uA
Output leakage current; 0V VOUT VDDQ;
DQ and ODT disabled
IOZ
-5
5
uA


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