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LTC4070IMS8EPBF Datasheet(PDF) 8 Page - Linear Technology |
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LTC4070IMS8EPBF Datasheet(HTML) 8 Page - Linear Technology |
8 / 16 page LTC4070 8 4070f OPERATION NTC Qualified Float Voltage, ΔVFLOAT(NTC) The NTC pin voltage is compared against an internal resistor divider tied to the NTCBIAS pin. This divider has tap points that are matched to the NTC thermistor resis- tance/temperature conversion table for a Vishay curve 2 type thermistor at temperatures of 40°C, 50°C, 60°C, and 70°C. The type #2 thermistor is also designated by a B25/85 value of 3490. Battery temperature conditioning adjusts the float voltage down to VFLOAT_EFF when the NTC thermistor indicates that the battery temperature is too high. For a 10k curve 2 thermistor and a 10k NTCBIAS resistor, each 10°C increase in temperature above 40°C causes the float voltage to drop by a fixed amount, ΔVFLOAT(NTC),dependingonADJ.IfADJ is at GND, the float voltage steps down by 50mV for each 10°C temperature increment. If ADJ is floating, the step size is 75mV. And if ADJ is at VCC, the step size is 100mV. Refer to Table 1 for the range of VFLOAT_EFF programming. Table 1. NTC Qualified Float Voltage ADJ ΔVFLOAT(NTC) TEMPERATURE VNTC AS % OF NTCBIAS VFLOAT_ EFF GND 50mV T < 40°C 40°C ≤ T < 50°C 50°C ≤ T < 60°C 60°C ≤ T < 70°C 70°C < T VNTC > 36.5% 29.0% < VNTC ≤ 36.5% 22.8% < VNTC ≤ 29.0% 17.8% < VNTC ≤ 22.8% VNTC ≤ 17.8% 4.000V 3.950V 3.900V 3.850V 3.800V Float 75mV T < 40°C 40°C ≤ T < 50°C 50°C ≤ T < 60°C 60°C ≤ T < 70°C 70°C ≤ T VNTC > 36.5% 29.0% < VNTC ≤ 36.5% 22.8% < VNTC ≤ 29.0% 17.8% < VNTC ≤ 22.8% VNTC ≤ 17.8% 4.100V 4.025V 3.950V 3.875V 3.800V VCC 100mV T < 40°C 40°C ≤ T < 50°C 50°C ≤ T < 60°C 60°C ≤ T < 70°C 70°C ≤ T VNTC > 36.5% 29.0% < VNTC ≤ 36.5% 22.8%< VNTC ≤ 29.0% 17.8% < VNTC ≤ 22.8% VNTC ≤ 17.8% 4.200V 4.100V 4.000V 3.900V 3.800V For all ADJ pin settings the lowest float voltage setting is 3.8V = VFLOAT – 4•ΔVFLOAT(NTC) = VFLOAT_MIN. This occurs at NTC thermistor temperatures above 70°C, or if the NTC pin is grounded. To conserve power in the NTCBIAS and NTC resistors, the NTCBIAS pin is sampled at a low duty cycle at the same time that the ADJ pin state is sampled. High Battery Status Output: HBO The HBO pin pulls high when VCC rises to within VHBTH of the programmed float voltage, VFLOAT_EFF, including NTC qualified float voltage adjustments. If VCC drops below the float voltage by more than VHBTH + VHBHY the HBO pin pulls low to indicate that the bat- tery is not at full charge. The input supply current of the LTC4070 drops to less than 450nA (typ) as the LTC4070 no longer shunts current to protect the battery. The NTCBIAS sample clock slows to conserve power, and the DRV pin is pulled up to VCC. For example, if the NTC thermistor requires the float voltage to be dropped by 100mV (ADJ = VCC and 0.29•VNTCBIAS < VNTC < 0.36•VNTCBIAS) then the HBO rising threshold is detected when VCC rises past VFLOAT – ΔVFLOAT(NTC) – VHBTH = 4.2V – 100mV – 40mV = 4.06V. The HBO falling threshold in this case is detected when VCC falls below VFLOAT – ΔVFLOAT(NTC) – VHBTH – VHBHY = 4.2V – 100mV – 40mV – 100mV = 3.96V. Low Battery Status Output: LBO When the battery voltage drops below 3.2V, the LBO pin pulls high. Otherwise, the LBO pin pulls low when the battery voltage exceeds about 3.5V. While the low battery condition persists, NTC and ADJ pins are no longer sampled—the functions are disabled—and total supply consumption for the LTC4070 drops to less than 300nA (typ). |
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