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LTC4070EDDBPBF Datasheet(PDF) 6 Page - Linear Technology

Part # LTC4070EDDBPBF
Description  Li-Ion/Polymer Shunt Battery Charger System
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4070EDDBPBF Datasheet(HTML) 6 Page - Linear Technology

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LTC4070
6
4070f
PIN FUNCTIONS
NTCBIAS (Pin 1): NTC Bias Pin. Connect a resistor from
NTCBIAS to NTC, and a thermistor from NTC to GND. Float
NTCBIAS when not in use. Minimize parasitic capacitance
on this pin.
NTC (Pin 2): Input to the Negative Temperature Coefficient
Thermistor Monitoring Circuit. The NTC pin connects to
a negative temperature coefficient thermistor which is
typically co-packaged with the battery to determine the
temperature of the battery. If the battery temperature is too
high, the float voltage is reduced. Connect a low drift bias
resistor from NTCBIAS to NTC and a thermistor from NTC
to GND. When not in use, connect NTC to VCC. Minimize
parasitic capacitance on this pin.
ADJ (Pin 3): Float Voltage Adjust Pin. Connect ADJ to GND
to program 4.0V float voltage. Disconnect ADJ to program
4.1V float voltage. Connect ADJ to VCC to program 4.2V
float voltage. The float voltage is also adjusted by the NTC
thermistor.
HBO (Pin 4): High Battery Monitor Output (Active High).
HBO is a CMOS output that indicates that the battery is fully
charged and current is being shunted away from BAT. This
pin is driven high when VCC rises to within VHBTH of the
effective float voltage. The absolute value of this threshold
depends on ADJ and NTC, both of which affect the float
voltage. HBO is driven low when VCC falls by more than
(VHBTH + VHBHY) below the float voltage. Refer to Table 1
for the effective float voltage.
GND (Pin 5, Exposed Pad Pin 9): Ground. The exposed
package pad must be connected to PCB ground.
LBO (Pin 6): Low Battery Monitor Output (Active High).
LBO is a CMOS output that indicates when the battery
is discharged below 3.2V or rises above 3.5V. This pin
is driven high if VCC < VLBTH, and is driven low if VCC >
(VLBTH + VLBHY).
DRV (Pin 7): External Drive Output. Connect to the gate of
an external PFET to increase shunt current for applications
which require more than 50mA charge current. Minimize
capacitance and leakage current on this pin. When not in
use, float DRV.
VCC (Pin 8): Input Supply Pin. The input supply voltage is
regulated to 4.0V, 4.1V, or 4.2V depending on the ADJ pin
state (see the ADJ pin description for more detail). This pin
can sink up to 50mA in order to keep the voltage regula-
tion within accuracy limits. When no battery is present,
decouple to GND with a capacitor, CIN, of at least 0.1μF.


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