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LTC3865IFE Datasheet(PDF) 9 Page - Linear Technology |
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LTC3865IFE Datasheet(HTML) 9 Page - Linear Technology |
9 / 36 page LTC3865/LTC3865-1 3865f pin FuncTions (QFN/TSSOP) VOSENSE1, VOSENSE2 (Pins 1, 8/Pins 5, 13): When the internal programmable resistive divider is used, these pins must be connected to their corresponding outputs. When an external resistive divider is used, these pins are used for error amplifier feedback inputs. They receive the remotely sensed feedback voltages for each channel directly from the outputs or from the external divider across the outputs. TK/SS1, TK/SS2 (Pins 2, 7/Pins 6, 12): Output Voltage Tracking and Soft-Start Inputs. When one channel is configured to be master of the two channels, a capacitor to ground at this pin sets the ramp rate for the master channel’s output voltage. When a channel is configured to be the slave of the two channels, the output voltage ramp of the master channel can be reproduced by a re- sistor divider and applied to this pin of the slave channel. Internal soft-start currents of 1.3µA charge the soft-start capacitors. ITH1,ITH2(Pins3,6/Pins7,11):CurrentControlThresholds andErrorAmplifierCompensationPoints.Eachassociated channels’currentcomparatortrippingthresholdincreases with its ITH control voltage. VID11, VID12, VID21, VID22 (Pins 4, 5, 12, 28/ Pins 9, 10, 18, 37): VID Inputs for Output Voltage Programming. Tie these pins to INTVCC, GND or leave them floating to set the output voltages. ILIM (Pin 13/Pin 19) (LTC3865 Only): Current Compara- tor Sense Voltage Range Inputs. This pin can be tied to SGND, FLOAT or INTVCC to set the maximum current sense threshold for each comparator. Current compara- tor sense voltage range of the LTC3865-1 is set to default value of 50mV. PGOOD (Pin 14 LTC3865/NA): Co-Bonded Power Good Indicator Output for LTC3865 in QFN Package. Open-drain logic output that is pulled to ground when either channel output exceeds ±10% regulation window, after the internal 20µs power bad mask timer expires. PGOOD1, PGOOD2 (Pins 14, 13 LTC3865-1/Pins 21, 20): Separate Power Good Indicator Outputs for LTC3865-1 in QFNpackageandLTC3865inFEpackage.Open-drainlogic output that is pulled to ground when the corresponding channel output exceeds ±10% regulation window, after the internal 20µs power bad mask timer expires. PGND (Pin 18/NA): Power Ground Pin. Connect this pin closely to the sources of the bottom N-channel MOSFETs, the (–) terminal of CVCC and the (–) terminal of CIN. EXTVCC (Pin 20/Pin 28): External Power Input to an Inter- nal Switch Connected to INTVCC. This switch closes and supplies the IC power, bypassing the internal low dropout regulator, whenever EXTVCC is higher than 4.7V. Do not exceed 6V on this pin. INTVCC(Pin21/Pin29): Internal5VRegulatorOutput.The control circuits are powered from this voltage. Decouple this pin to PGND with a minimum of 4.7µF low ESR tan- talum or ceramic capacitor. VIN (Pin 22/Pin 30): Main Input Supply. Decouple this pin to PGND with a capacitor (0.1µF to 1µF). BG1, BG2 (Pins 23, 19/Pin 31, 27): Bottom Gate Driver Outputs. These pins drive the gates of the bottom N-chan- nel MOSFETs between PGND and INTVCC. BOOST1, BOOST2 (Pins 24, 17/Pins 33, 25): Boosted FloatingDriverSupplies.The(+)terminalofthebooststrap capacitors connect to these pins. These pins swing from a diode voltage drop below INTVCC up to VIN + INTVCC. TG1, TG2 (Pins 25, 16/Pins 34, 23): Top Gate Driver Outputs. These are the outputs of floating drivers with a voltage swing equal to INTVCC superimposed on the switch nodes voltages. SW1, SW2 (Pins 26, 15/Pins 35, 22): Switch Node Connections to Inductors. Voltage swing at these pins is from a Schottky diode (external) voltage drop below ground to VIN. |
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