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AM1705BPTP4 Datasheet(PDF) 1 Page - Texas Instruments

Part # AM1705BPTP4
Description  AM1705 ARM Microprocessor
Download  155 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM1705BPTP4 Datasheet(HTML) 1 Page - Texas Instruments

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AM1705
www.ti.com
SPRS657 – FEBRUARY 2010
AM1705 ARM Microprocessor
Check for Samples: AM1705
1
AM1705 ARM Microprocessor
1.1
Features
123
– Two Independent Programmable Realtime
• Applications
Unit (PRU) Cores
– Industrial Automation
32-Bit Load/Store RISC architecture
– Home Automation
4K Byte instruction RAM per core
– Test and Measurement
512 Bytes data RAM per core
– Portable Data Terminals
PRU Subsystem (PRUSS) can be disabled
– Eduational Consoles
via software to save power
– Power Protection Systems
– Standard power management mechanism
• 375/456-MHz ARM926EJ-S™ RISC Core
Clock gating
– 32-Bit and 16-Bit (Thumb®) Instructions
Entire subsystem under a single PSC
– Single Cycle MAC
clock gating domain
– ARM® Jazelle® Technology
– Dedicated interrupt controller
– EmbeddedICE-RT™ for Real-Time Debug
– Dedicated switched central resource
• ARM9 Memory Architecture
• Multimedia Card (MMC)/Secure Digital (SD)
– 16K-Byte Instruction Cache
Card Interface with Secure Data I/O (SDIO)
– 16K-Byte Data Cache
• Two Master/Slave Inter-Integrated Circuit (I2C
– 8K-Byte RAM (Vector Table)
Bus™)
– 64K-Byte ROM
• USB 2.0 OTG Port With Integrated PHY (USB0)
• Enhanced Direct-Memory-Access Controller 3
– USB 2.0 High-/Full-Speed Client
(EDMA3):
– USB 2.0 High-/Full-/Low-Speed Host
– 2 Transfer Controllers
– End Point 0 (Control)
– 32 Independent DMA Channels
– End Points 1,2,3,4 (Control, Bulk, Interrupt or
– 8 Quick DMA Channels
ISOC) Rx and Tx
– Programmable Transfer Burst Size
• Two Multichannel Audio Serial Ports:
• 128K-Byte RAM Memory
– Transmit/Receive Clocks up to 50 MHz
• 3.3V LVCMOS IOs (except for USB interface)
– Six Clock Zones and 28 Serial Data Pins
• Two External Memory Interfaces:
– Supports TDM, I2S, and Similar Formats
– EMIFA
– FIFO buffers for Transmit and Receive
NOR (8-/16-Bit-Wide Data)
• 10/100 Mb/s Ethernet MAC (EMAC):
NAND (8-/16-Bit-Wide Data)
– IEEE 802.3 Compliant (3.3-V I/O Only)
– EMIFB
– RMII Media Independent Interface
16-Bit SDRAM With 256MB Address
– Management Data I/O (MDIO) Module
Space
• One 64-Bit General-Purpose Timer
• Three Configurable 16550 type UART Modules:
(Configurable as Two 32-Bit Timers)
– UART0 With Modem Control Signals
• One 64-bit General-Purpose/Watchdog Timer
– 16-byte FIFO
(Configurable as Two 32-bit General-Purpose
Timers)
– 16x or 13x Oversampling Option
• Three Enhanced Pulse Width Modulators
• Two Serial Peripheral Interfaces (SPI) Each
(eHRPWM):
With One Chip-Select
– Dedicated 16-Bit Time-Base Counter With
• Programmable Real-Time Unit Subsystem
Period And Frequency Control
(PRUSS)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
ARM926EJ-S, EmbeddedICE-RT, ETM9, CoreSight are trademarks of ARM Limited.
3
ARM, Jazelle are registered trademarks of ARM Limited.
ADVANCE INFORMATION concerns new products in the sampling
Copyright © 2010, Texas Instruments Incorporated
or preproduction phase of development. Characteristic data and other
specifications are subject to change without notice.


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