US1261

3-4

Rev. 1.7

3/22/99

APPLICATION INFORMATION

APPLICATION INFORMATION

Introduction

The US1261 is a dual fixed output Low Dropout (LDO)

regulator available in a 5 pin TO-220 or TO-263 pack-

ages. This voltage regulator is designed specifically for

PentiumII processor applications requiring 2.5V and 1.5

V supplies, eliminating the need for a second regu-

lator resulting in lower overall system cost. The

US1261 is designed to take advantage of 5V supply to

provide the drive for the pass transistor, allowing 2.5V

supply to be generated from 3.3V input.This feature im-

proves the power dissipation of the 2.5V regulator sub-

stantially allowing a smaller heat sink to be used for the

application. Compared to the US1260 dual adjustable

regulator, the US1261 includes the resistor dividers that

are otherwise needed with the US1260, eliminating 4

external components and their tolerances, resulting in a

more accurate initial accuracy for each output voltage.

Other features of the device include; fast response to

sudden load current changes, such as GTL+ termina-

tion application and thermal shutdown protection to pro-

tect the device if an overload condition occurs.

Stability

The US1261 requires the use of an output capacitor as

part of the frequency compensation in order to make the

regulator stable. Typical designs for the microproces-

sor applications use standard electrolytic capacitors with

typical ESR in the range of 50 to 100 m

Ω and the output

capacitance of 500 to 1000uF. Fortunately as the ca-

pacitance increases, the ESR decreases resulting in a

fixed RC time constant. The US1261 takes advantage of

this phenomena in making the overall regulator loop

stable. For most applications a minimum of 100uF alu-

minum electrolytic capacitor with the maximum ESR of

0.3

Ω such as Sanyo, MVGX series ,Panasonic FA se-

ries as well as the Nichicon PL series insures both sta-

bility and good transient response. The US1261 also

requires a 1 uF ceramic capacitor connected from Vin

to Vctrl and a 10

Ω, 0.1W resistor in series with Vctrl pin

in order to further insure stability.

Thermal Design

The US1261 incorporates an internal thermal shutdown

that protects the device when the junction temperature

exceeds the maximum allowable junction temperature.

Although this device can operate with junction tempera-

tures in the range of 150

°C ,it is recommended that the

selected heat sink be chosen such that during maxi-

mum continuous load operation the junction tempera-

ture is kept below this number. Two examples are given

which shows the steps in selecting the proper regulator

heat sink for driving the Pentium II processor GTL+ ter-

mination resistors and the Clock IC using 1261 in TO220

and TO-263 packages.

Example # 1

Assuming the following specifications :

The steps for selecting a proper heat sink to keep the

junction temperature below 135

°C is given as :

1) Calculate the maximum power dissipation using :

2) Select a package from the datasheet and record its

junction to case (or Tab) thermal resistance.

Selecting TO220 package gives us :

3) Assuming that the heat sink is Black Anodized, cal-

culate the maximum Heat sink temperature allowed :

Assume ,

resistance for Black Anodized)

4) With the maximum heat sink temperature calculated

in the previous step, the Heat Sink to Air thermal resis-

tance

5) Next , a heat sink with lower

lated in step 4 must be selected. One way to do this is

to simply look at the graphs of the “Heat Sink Temp

Rise Above the Ambient” vs. the “Power Dissipation” and

V

3.3V

V

1.5 V

V

= 2.5 V

I

5.4A

I

= 0.4 A

T

35 C

IN

OUT 2

OUT 1

OUT 2

OUT 1

A

MAX

MAX

=

=

=

=

°

(

)

(

)

T

T

P

T

135

10

2.7

0.05

107.4 C

S

J

D

S

=

−

×

+

=

−

×

+

=

°

θ

θ

JC

CS

S

A

T

T

C

=

−

=

−

=

°

107 4

35

72 4

.

.

θ

θ

SA

T

D

SA

P

C W

=

=

=

°

∆

72 4

10

7 24

.

.

/

(

)

(

)

(

)

(

)

P

I

V

V

I

V

V

P

0.4

+ 5.4

3.3

1.5

W

D

OUT1

IN

OUT1

OUT2

IN

OUT2

D

=

×

−

+

×

−

=

×

−

×

−

=

3 3

2 5

10

.

.

C W

= °

2 7

.

/