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US1050CD Datasheet(PDF) 4 Page - UNISEM |
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US1050CD Datasheet(HTML) 4 Page - UNISEM |
4 / 7 page US1050 2-36 Rev. 1.3 10/27/00 Output Voltage Setting The US1050 can be programmed to any voltages in the range of 1.25V to 5.5V with the addition of R1 and R2 external resistors according to the following formula: Figure 2 - Typical application of the US1050 for programming the output voltage. The US1050 keeps a constant 1.25V between the out- put pin and the adjust pin. By placing a resistor R1 across these two pins a constant current flows through R1, add- ing to the Iadj current and into the R2 resistor producing a voltage equal to the (1.25/R1)*R2 + Iadj*R2 which will be added to the 1.25V to set the output voltage. This is summarized in the above equation. Since the minimum load current requirement of the US1050 is 10 mA , R1 is typically selected to be 121 Ω resistor so that it auto- matically satisfies the minimum current requirement. Notice that since Iadj is typically in the range of 50uA it only adds a small error to the output voltage and should only be considered when a very precise output voltage setting is required. For example, in a typical 3.3V appli- cation where R1=121 Ω and R2=200Ω the error due to Iadj is only 0.3% of the nominal set point. Load Regulation Since the US1050 is only a 3 terminal device , it is not possible to provide true remote sensing of the output voltage at the load.Figure 3 shows that the best load Figure 3 - Schematic showing connection for best load regulation Stability The US1050 requires the use of an output capacitor as part of the frequency compensation in order to make the regulator stable. Typical designs for microprocessor ap- plications use standard electrolytic capacitors with a typical ESR in the range of 50 to 100 m Ω and an output capacitance of 500 to 1000uF. Fortunately as the ca- pacitance increases, the ESR decreases resulting in a fixed RC time constant. The US1050 takes advantage of this phenomena in making the overall regulator loop stable.For most applications a minimum of 100uF alu- minum electrolytic capacitor such as Sanyo MVGX se- ries ,Panasonic FA series as well as the Nichicon PL series insures both stability and good transient response. regulation is achieved when the bottom side of R2 is connected to the load and the top side of R1 resistor is connected directly to the case or the Vout pin of the regulator and not to the load. In fact , if R1 is connected to the load side, the effective resistance between the regulator and the load is gained up by the factor of (1+R2/ R1) ,or the effective resistance will be ,Rp(eff)=Rp*(1+R2/ R1).It is important to note that for high current applica- tions, this can represent a significant percentage of the overall load regulation and one must keep the path from the regulator to the load as short as possible to mini- mize this effect. V V R R I R Where : V Typically I lly R in figure OUT REF ADJ REF ADJ = + + × 1 125 50 2 2 1 2 1 2 V = . = uA Typica & R as shown Vout 1050app2-1.0 R1 R2 Vin Vref IAdj = 50uA Adj Vout Vin US1050 1050app3-1.0 R1 R2 Vin RL Rp PARASITIC LINE RESISTANCE US1050 Adj Vout Vin |
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