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DM9102DEP Datasheet(PDF) 3 Page - Davicom Semiconductor, Inc. |
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DM9102DEP Datasheet(HTML) 3 Page - Davicom Semiconductor, Inc. |
3 / 70 page DM9102D Single Chip Fast Ethernet NIC Controller Final 3 Version: DM9102D-DS-F01 May 10, 2006 7.3.4 Physical Layer Overview.............................................48 7.4 Serial Management Interface.........................................49 7.4.1 Management Interface - Read Frame Structure ....49 7.4.2 Management Interface - Write Frame Structure ...49 7.5 Power Management .......................................................51 7.5.1 Overview .......................................................................51 7.5.2 PCI Function Power Management Status ................51 7.5.3 The Power Management Operation..........................51 7.6 Sample Frame Programming Guide ............................53 7.7 EEPROM Overview........................................................54 7.7.1 Subsystem ID .............................................................54 7.7.2 Vendor ID ....................................................................54 7.7.3 Auto_ Load_ Control....................................................54 7.7.4 New_ Capabilities_ Enable.........................................54 7.7.5 PMC...............................................................................54 7.7.6 Byte Offset (15).............................................................54 7.7.7 Ethernet Address .........................................................55 7.7.8 Example of DM9102D EEPROM Format.................55 7.8 External MII Interface ......................................................56 7.8.1 The Sharing Pin Table.................................................56 8. DC and AC Electrical Characteristics..............................57 8.1 Absolute Maximum Ratings( 25 °C )..............................57 8.2 Operating Conditions ......................................................57 8.3 DC Electrical Characteristics..........................................58 8.4 AC Electrical Characteristics & Timing Waveforms ....59 8.4.1 PCI Clock Specifications Timing...........…………….59 8.4.2 Other PCI Signals Timing Diagram............................59 8.4.3 Boot ROM Timing ........................................................60 8.4.4 EEPROM Read Timing...............................................60 8.4.5 TP Interface...................................................................61 8.4.6 Oscillator/Crystal Timing..............................................61 8.4.7 Auto-negotiation and Fast Link Pulse Timing Parameters.....................................................................61 8.4.8 Fast Link Pulses...........................................................61 9. Application Notes...............................................................62 9.1 Network Interface Signal Routing..................................62 9.2 10Base-T/100Base-TX Application Figure 9-1 .........62 9.3 10Base-T/100Base-TX (Power Reduction Application) Figure 9-2.......................................................................63 9.4 Power Supply Decoupling Capacitors Figure 9-3.....64 9.5 Ground Plane Layout Figure 9-4-1 Figure 9-4-2 Figure 9-4-3 .............65 9.6 Power Plane Partitioning Figure 9-5...........................66 9.7 Magnetics Selection Guide Table 9-1: 10/100M Magnetic Sources......................67 Table 9-2: Magnetic Specification Requirements .....67 9.8 Crystal Selection Guide Table 9-3: Crystal Specifications.................................68 Figure 9-6: Crystal Circuit Diagram.............................68 10 Package Information........................................................69 Package Information (128 pin, LQFP) ...........................69 11. Ordering Information…………………………………..70 |
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