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DRV604PWP Datasheet(PDF) 10 Page - Texas Instruments |
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DRV604PWP Datasheet(HTML) 10 Page - Texas Instruments |
10 / 21 page R in R in R fb R fb + - C in C in - In + In R in R fb + - C in - In R in R fb R x + - C x C in + In Differential Input Inverting Non Inverting DRV604 SLOS659 – JANUARY 2010 www.ti.com Decoupling Capacitors The DRV604 is a DirectPath™ amplifier that requires adequate power supply decoupling to ensure that the noise and total harmonic distortion (THD) are low. A good low equivalent-series-resistance (ESR) ceramic capacitor, typically 1µF, placed as close as possible to the device PVDD leads works best. Placing this decoupling capacitor close to the DRV604 is important for the performance of the amplifier. For filtering lower frequency noise signals, a 10µF or greater capacitor placed near the audio power amplifier would also help, but it is not required in most applications because of the high PSRR of this device. Gain Setting Resistors Ranges The gain setting resistors, Rin and Rfb, must be chosen so that noise, stability and input capacitor size of the DRV604 is kept within acceptable limits. Voltage gain is defined as Rfb divided by Rin. Selecting values that are too low demands a large input ac-coupling capacitor, CIN. Selecting values that are too high increases the noise of the amplifier. Table 1 lists the recommended resistor values for different gain settings. Table 1. Recommended Resistor Values INPUT RESISTOR FEEDBACK RESISTOR DIFFERENTIAL INVERTING INPUT NON INVERTING VALUE, Rin VALUE, Rfb INPUT GAIN GAIN INPUT GAIN 10 k Ω 10 k Ω 1.0 V/V –1.0 V/V 2.0 V/V 10 k Ω 15 k Ω 1.5 V/V –1.5 V/V 2.5 V/V 10 k Ω 20 k Ω 2.0 V/V –2.0 V/V 3.0 V/V 4.7 k Ω 47 k Ω 10.0 V/V –10.0 V/V 11.0 V/V Figure 14. Differential, Inverting and Non-inverting Gain Configuration Internal and External Under Voltage Detection and RESET Output The DRV604 contains an internal precision band gap reference voltage and 2 comparators, one is used to monitor the supply voltages, PVDD_LD and PVDD_HP, and the other to monitor an external user selectable voltage on pin 25. The internal PVDD monitor is set at 2.8 V with 200 mV hysteresis. The external under voltage detection can be used to shutdown the DRV604 before an input device can make a pop. The shutdown threshold at the Ex_UVP pin is 1.25 V. A resistor divider is used to obtain the shutdown threshold and hysteresis desired for the application. 10 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s) :DRV604 |
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