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PCF8883 Datasheet(PDF) 7 Page - NXP Semiconductors |
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PCF8883 Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 24 page PCF8883_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 16 October 2009 7 of 24 NXP Semiconductors PCF8883 Capacitive proximity switch with auto-calibration The counter, following the sensor logic depicted in Figure 3, counts the pulses of CUP or CDN respectively. The counter is reset every time the pulse sequence changes from CUP to CDN or vice versa. Pin OUT will only be activated when a sufficient number of consecutive CUP or CDN pulses occur. Low level interference or slow changes in the input capacitance do not cause the output to switch. Various measures, such as asymmetrical charge and discharge steps, are taken to ensure that the output switches off correctly. A special start-up circuit ensures that the device reaches equilibrium quickly when the supply is attached. Pin OUT is an open-drain output capable of pulling an external load Rext (at maximum current of 20 mA) up to VDD. The load resistor must be dimensioned appropriately, taking the maximum expected VDD voltage into account. The output will be automatically deactivated (short circuit protection) for loads in excess of 30 mA. Pin OUT can also drive a CMOS input without connection of the external load. A small internal 150 nA current sink Isink enables a full voltage swing to take place on OUT, even if no load resistor is connected. This is useful for driving purely capacitive CMOS inputs. The falling slope can be fairly slow in this mode, depending on load capacitance. The sampling rate (fs) corresponds to half of the frequency used in the RC timing circuit. The sampling rate can be adjusted within a specified range by selecting the value of CCLIN. The oscillator frequency is internally modulated by 4 % using a pseudo random signal. This prevents interference caused by local AC-fields. 8.1 Output switching modes The output switching behavior can be selected using pin TYPE (see Figure 5) • Push-button (TYPE connected to VSS): The output OUT is active as long as the capacitive event2 lasts. • Toggle (TYPE connected to VDD(INTREGD)): The output OUT is activated by the first capacitive event and deactivated by a following capacitive event. • Pulse (CTYPE connected between TYPE and VSS): The output OUT is activated for a defined time at each capacitive event. The pulse duration is determined by the value of CTYPE and is approximately 2.5 ms/nF. A typical value for CTYPE is 4.7 nF which results in an output pulse duration of about 10 ms. The maximum value of CTYPE is 470 nF which results in a pulse duration of about 1 s. Capacitive events are ignored that occur during the time the output is active. Figure 5 illustrates the switching behavior for the output switching modes. Additionally the graph illustrates, that short term disturbances on the sensor are suppressed by the circuit. 2. A capacitive event is a dynamic increase of capacitance at the sensor input pin IN. |
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