LPC1769 datasheet(8/66 Pages) NXP

Part #	LPC1769

Description	32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN

Download	66 Pages

Scroll/Zoom	100%

Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

Logo

8 / 66 page

LPC1769_68_67_66_65_64_4

Product data sheet

Rev. 04 — 1 February 2010

8 of 66

NXP Semiconductors

LPC1769/68/67/66/65/64

32-bit ARM Cortex-M3 microcontroller

P0[16]/RXD1/

SSEL0/SSEL

63[1]

I/O

P0[16] — General purpose digital input/output pin.

I

RXD1 — Receiver input for UART1.

I/O

SSEL0 — Slave Select for SSP0.

I/O

SSEL — Slave Select for SPI.

P0[17]/CTS1/

MISO0/MISO

61[1]

I/O

P0[17] — General purpose digital input/output pin.

I

CTS1 — Clear to Send input for UART1.

I/O

MISO0 — Master In Slave Out for SSP0.

I/O

MISO — Master In Slave Out for SPI.

P0[18]/DCD1/

MOSI0/MOSI

60[1]

I/O

P0[18] — General purpose digital input/output pin.

I

DCD1 — Data Carrier Detect input for UART1.

I/O

MOSI0 — Master Out Slave In for SSP0.

I/O

MOSI — Master Out Slave In for SPI.

P0[19]/DSR1/

SDA1

59[1]

I/O

P0[19] — General purpose digital input/output pin.

I

DSR1 — Data Set Ready input for UART1.

I/O

SDA1 — I2C1 data input/output (this is not an I2C-bus compliant open-drain pin).

P0[20]/DTR1/SCL1 58[1]

I/O

P0[20] — General purpose digital input/output pin.

O

DTR1 — Data Terminal Ready output for UART1. Can also be configured to be an

RS-485/EIA-485 output enable signal.

I/O

SCL1 — I2C1 clock input/output (this is not an I2C-bus compliant open-drain pin).

P0[21]/RI1/RD1

57[1]

I/O

P0[21] — General purpose digital input/output pin.

I

RI1 — Ring Indicator input for UART1.

I

RD1 — CAN1 receiver input. (LPC1769/68/66/65/64 only).

P0[22]/RTS1/TD1

56[1]

I/O

P0[22] — General purpose digital input/output pin.

O

RTS1 — Request to Send output for UART1. Can also be configured to be an

RS-485/EIA-485 output enable signal.

O

TD1 — CAN1 transmitter output. (LPC1769/68/66/65/64 only).

P0[23]/AD0[0]/

I2SRX_CLK/

CAP3[0]

9[2]

I/O

P0[23] — General purpose digital input/output pin.

I

AD0[0] — A/D converter 0, input 0.

I/O

I2SRX_CLK — Receive Clock. It is driven by the master and received by the

slave. Corresponds to the signal SCK in the I2S-bus specification.

(LPC1769/68/67/66/65 only).

I

CAP3[0] — Capture input for Timer 3, channel 0.

P0[24]/AD0[1]/

I2SRX_WS/

CAP3[1]

8[2]

I/O

P0[24] — General purpose digital input/output pin.

I

AD0[1] — A/D converter 0, input 1.

I/O

I2SRX_WS — Receive Word Select. It is driven by the master and received by the

slave. Corresponds to the signal WS in the I2S-bus specification.

(LPC1769/68/67/66/65 only).

I

CAP3[1] — Capture input for Timer 3, channel 1.

Table 3.

Pin description …continued

Symbol

Type

Description

Similar Part No. - LPC1769

Manufacturer	Part #	Datasheet	Description
NXP Semiconductors	LPC1769	144Kb / 2P	Cortex-M3 based microcontrollers with Ethernet, USB, CAN and 12-bit ADC December 2009
	LPC1769	762Kb / 79P	32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet Rev. 7-5 April 2011
	LPC1769	4Mb / 12P	NXP Microcontrollers Selection Guide November 2012
	LPC1769	918Kb / 86P	32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN Rev. 9.3-8 January 2014
	LPC1769FBD100	4Mb / 835P	LPC17xx User manual Rev. 01-4 January 2010

More results

Similar Description - LPC1769

Manufacturer	Part #	Datasheet	Description
NXP Semiconductors	LPC1768	311Kb / 72P	32-bit ARM Cortex-M3 microcontroller up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN Rev. 02-11 February 2009
	LPC1768FBD100551	828Kb / 82P	32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN Rev. 9-10 August 2012
	LPC1768	1Mb / 65P	32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN Rev. 03-19 November 2009
	LPC1763FBD100551	918Kb / 86P	32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN Rev. 9.3-8 January 2014
	LPC1758	299Kb / 71P	32-bit ARM Cortex-M3 MCU up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN Rev. 02-11 February 2009
	LPC1759	1Mb / 74P	32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN Rev. 7-29 March 2011
	LPC1759	957Kb / 64P	32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN Rev. 04-26 January 2010
	LPC1759	1,013Kb / 80P	32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN Rev. 8.6-18 August 2015
	LPC1788	1Mb / 117P	32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 96 kB SRAM; USB Device/Host/OTG Rev. 2-27 May 2011
	LPC1769	762Kb / 79P	32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet Rev. 7-5 April 2011

More results

LPC1769 Datasheet(PDF) 8 Page - NXP Semiconductors

LPC1769 Datasheet(HTML) 8 Page - NXP Semiconductors

Similar Part No. - LPC1769

Similar Description - LPC1769

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66

Datasheet Download

Link URL