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TQ9501 Datasheet(PDF) 1 Page - TriQuint Semiconductor |
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TQ9501 Datasheet(HTML) 1 Page - TriQuint Semiconductor |
1 / 16 page T R I Q U I N T S E M I C O N D U C T O R , I N C . 1 For additional information and latest specifications, see our website: www.triquint.com TQ9501/9502 531/1063 Mbaud Fibre Channel Transmitter and Receiver Features • Compliant with ANSI X3T11 Fibre Channel Standard • Operates at 531.125 Mbaud and 1.0625 Gigabaud (1.25 Gigabaud max) • Low power dissipation (2.25 W, typical) • Low jitter • No external PLL components • 10-bit TTL-compatible data bus • Synchronous Data Bus Interface • Direct interface to TQ9303 ENDEC • Single +5 V supply • 48-pin MQuad package TQ9501 Transmitter 2 TQ9303 ENDEC TQ9502 Receiver 2 Data 10 Data Data 32 Control 12 HOST Optical Rx or Copper Interface 10 Optical Tx or Copper Interface 2 2 Fiber Optic Cable Parity 4 Parity 4 Control 11 Data 32 Control 2 Control 2 2 TriQuint’s Fibre Channel transmitter (TQ9501) and receiver (TQ9502) are part of the FC531/FC1063 (Fibre Channel 531 and 1063 Megabaud) chip set. In addition to the transmitter and receiver, TriQuint offers the ENcoder/ DECoder (TQ9303 ENDEC). The TQ9501, TQ9502, TQ9303 and a gigabit fiber optic module set provide a complete solution for Fibre Channel's FC0 and FC1 layers as well as partial support for the FC2 layer. The TQ9501 and TQ9502 are designed in TriQuint's proprietary 0.7-micron GaAs process, enabling the transmitter and receiver to run at higher speeds and lower power than with conventional processes. The transmitter and receiver data interface has been selected to be 10 bits in order to conserve input/output power and to reduce pin count and package size. The trans- mitter performs the parallel-to-serial conversion and generates the internal high-speed clock for the serial output. The receiver performs serial-to- parallel conversion, recovers the clock and data from the serial input, and detects the K28.5 character (Fibre Channel standard “SYNC” transmission character). The TQ9303 ENDEC implements 8b/10b encoding and decoding, ordered set encoding and decoding, parity checking and generation, 32-bit CRC checking and generation, and word synchronization as defined in the Fibre Channel Physical and Signaling Interface Standard (FC-PH). Fibre Channel provides a high-speed physical layer for Intelligent Peripheral Interface (IPI) and Small Computer System Interface (SCSI) upper-layer command sets, High-Performance Parallel Interface (HIPPI) data link layer, and other user-defined command sets. Fibre Channel replaces the SCSI, IPI and HIPPI physical interfaces with a higher- speed interface capable of driving longer distances. |
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