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LTC3588EDD-1PBF Datasheet(PDF) 9 Page - Linear Technology |
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LTC3588EDD-1PBF Datasheet(HTML) 9 Page - Linear Technology |
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9 / 20 page  LTC3588-1 9 35881f The LTC3588-1 is an ultralow quiescent current power supply designed specifically for energy harvesting and/or low current step-down applications. The part is designed to interface directly to a piezoelectric or alternative A/C power source, rectify a voltage waveform and store harvested energy on an external capacitor, bleed off any excess power via an internal shunt regulator, and maintain a regulated output voltage by means of a nanopower high efficiency synchronous buck regulator. Internal Bridge Rectifier The LTC3588-1 has an internal full-wave bridge rectifier accessible via the differential PZ1 and PZ2 inputs that rectifies AC inputs such as those from a piezoelectric element. The rectified output is stored on a capacitor at the VIN pin and can be used as an energy reservoir for the buck converter. The low-loss bridge rectifier has a total drop of about 400mV with typical piezo generated currents (~10μA). The bridge is capable of carrying up to 50mA. One side of the bridge can be operated as a single-ended DC input. PZ1 and PZ2 should never be shorted together when the bridge is in use. Undervoltage Lockout (UVLO) When the voltage on VIN rises above the UVLO rising threshold the buck converter is enabled and charge is transferred from the input capacitor to the output capaci- tor. A wide (~1V) UVLO hysteresis window is employed with a lower threshold approximately 300mV above the selected regulated output voltage to prevent short cycling during buck power-up. When the input capacitor voltage is depleted below the UVLO falling threshold the buck converter is disabled. Extremely low quiescent current (450nA typical) in UVLO allows energy to accumulate on the input capacitor in situations where energy must be harvested from low power sources. Internal Rail Generation Two internal rails, CAP and VIN2,aregeneratedfromVIN and are used to drive the high side PMOS and low side NMOS of the buck converter, respectively. Additionally the VIN2 rail serves as logic high for output voltage select bits D0 and D1. The VIN2 rail is regulated at 4.8V above GND while the CAP rail is regulated at 4.8V below VIN. These are not intended to be used as external rails. Bypass capacitors are connected to the CAP and VIN2 pins to serve as energy reservoirs for driving the buck switches. When VIN is below 4.8V, VIN2 is equal to VIN and CAP is held at GND. Figure 1 shows the ideal VIN, VIN2 and CAP relationship. Figure 1. Ideal VIN, VIN2 and CAP Relationship VIN (V) 0 18 12 14 16 10 2 4 8 6 0 10 5 35881 F01 15 VIN VIN2 CAP OPERATION Buck Operation The buck regulator uses a hysteretic voltage algorithm to control the output through internal feedback from the VOUT sense pin. The buck converter charges an output capacitor through an inductor to a value slightly higher than the regulation point. It does this by ramping the inductor current up to 260mA through an internal PMOS switch and then ramping it down to 0mA through an in- ternal NMOS switch. This efficiently delivers energy to the output capacitor. The ramp rate is determined by VIN, VOUT, and the inductor value. If the input voltage falls below the |
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