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HT45R35V Datasheet(PDF) 9 Page - Holtek Semiconductor Inc |
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HT45R35V Datasheet(HTML) 9 Page - Holtek Semiconductor Inc |
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9 / 42 page  HT45R35V Rev. 1.00 9 January 15, 2009 Program Memory The program memory is used to store the program in- structions which are to be executed. It also contains data, table, and interrupt entries, and is organized into 2048 ´14 bits, addressed by the program counter and ta- ble pointer. Certain locations in the program memory are reserved for special usage: · Location 000H This area is reserved for program initialisation. After a device reset, the program always begins execution at location 000H. · Location 004H This location is reserved for the external interrupt 0 service program. If the INT0 input pin is activated, the interrupt is enabled and the stack is not full, the pro- gram begins execution at this location. · Location 008H This location is reserved for the external interrupt 1 service program. If the INT1 input pin is activated, the interrupt is enabled and the stack is not full, the pro- gram begins execution at this location. · Location 00CH This location is reserved for the Timer/Event Counter interrupt service program. If a Timer interrupt results from a Timer/Event Counter overflow, and the inter- rupt is enabled and the stack is not full, the program begins execution at this location. · Location 010H This location is reserved for the external RC oscilla- tion converter interrupt service program. If an interrupt results from an external RC oscillation converter, and if the interrupt is enabled and the stack is not full, the program begins execution at this location. · Table location Any location in the program memory can be used as a look-up table. The instructions ²TABRDC [m]² (the current page, 1 page=256 words) and ²TABRDL [m]² transfer the contents of the lower-order byte to the specified data memory, and the higher-order byte to TBLH. Only the destination of the lower-order byte in the table is well-defined, the other bits of the table word are transferred to the lower portion of TBLH, and the remaining 2 bits are read as ²0². The Table Higher-order byte register, TBLH, is read only. The ta- ble pointer, TBLP, is a read/write register, which indi- cates the table location. Before accessing the table, the location must be placed in TBLP. The TBLH regis- ter is read only and cannot be restored. If the main routine and the ISR (Interrupt Service Routine) both employ the table read instruction, the contents of the TBLH in the main routine are likely to be changed by the table read instruction used in the ISR and errors may occur. Therefore, using the table read instruction in the main routine and also in the ISR should be avoided. However, if the table read instruction has to be used in both the main routine and in the ISR, the in- terrupt should be disabled prior to the table read in- struction execution. The interrupt should not be re-enabled until TBLH has been backed up. All table related instructions require two cycles to complete the operation. These areas may function as normal pro- gram memory depending upon the requirements. Stack Register - STACK This is a special part of the memory which is used to save the contents of the program counter only. The stack is organised into 4-levels and is neither part of the data nor part of the program space, and is neither readable nor writable. The activated level is indexed by the stack pointer, SP and is neither readable nor writeable. At a subroutine call or interrupt acknowledgment, the con- tents of the program counter are pushed onto the stack. At the end of a subroutine or an interrupt routine, signaled 7 F F H n F F H P r o g r a m M e m o r y N o t e : n r a n g e s f r o m 0 t o 7 0 0 C H n 0 0 H 0 0 8 H 0 0 4 H 0 0 0 H D e v i c e I n i t i a l i z a t i o n P r o g r a m E x t e r n a l I n t e r r u p t 0 T i m e r / E v e n t C o u n t e r O v e r f l o w L o o k - u p T a b l e ( 2 5 6 w o r d s ) L o o k - u p T a b l e ( 2 5 6 w o r d s ) E x t e r n a l R C O s c i l l a t i o n C o n v e r t e r I n t e r r u p t E x t e r n a l I n t e r r u p t 1 1 4 - B i t s 0 1 0 H 7 0 0 H Program Memory Instruction Table Location *10 *9 *8 *7 *6 *5 *4 *3 *2 *1 *0 TABRDC [m] P10 P9 P8 @7 @6 @5 @4 @3 @2 @1 @0 TABRDL [m] 1 1 1 @7 @6 @5 @4 @3 @2 @1 @0 Table Location Note: *10~*0: Table location bits P10~P8: Current program counter bits @7~@0: Table pointer bits |
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