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MC9S08QG4MDTE Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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MC9S08QG4MDTE Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
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6 / 314 page  Revision History To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com/ The following revision history table summarizes changes contained in this document. © Freescale Semiconductor, Inc., 2007-2008. All rights reserved. Rev No. Revision Date Description of Changes 2 Draft A 06/08/2006 Previous version was 1.01; revision numbering will increment by integers from now on. Clarified PTA5 pullup behavior note; clarified that FCDIV is write once after reset; expanded FPROT/NVPROT register description added note for servicing the COP if the COP is enabled during an erase function; added requirements for using ACMP0 in ACMP introduction; added factory trim value section to ICS introduction; debug section added to Development Support chapter; updated RTI period and added RTI graph to control timing section; other minor grammar edits. 3 10/2007 Added 24-pin QFN package and updated the A-5. DC Characteristics table Supply Voltage row. 42/2008 Incorporated core team markups from shared review. See Project Sync issue #3313 for archive. 5 11/2009 Added new part number information for the maskset revision 4. Corrected bit 0 of KBISC register in the Table 4-2. |
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