Copyright

© ANPEC Electronics Corp.

Rev. A.3 - Jul., 2009

APL3206/A

www.anpec.com.tw

8

PIN

NO.

NAME

FUNCTION

1

ACIN

2

ACIN

Power Supply Input. Connect this pin to external DC supply. Bypass to GND with a 1

µF (minimum)

ceramic capacitor.

3

GND

Ground Terminal.

4

VBAT

Battery Voltage Sense Input. Connect this pin to pack positive terminal through a resistor.

5

GATDRV

Internal P-MOSFET Gate Input.

6

CHRIN

Output Pin. This pin provides supply voltage to the PMIC input. Bypass to GND with a 1

µF (minimum)

ceramic capacitor.

7

OUT

8

OUT

Output Pins. These pins provide supply source current in series with a resistor to battery.

-

EP

Exposed Thermal Pad. Must be electrically connected to the GND pin.

Block Diagram

Gate Driver and

Control Logic

POR

ACIN

VBAT

OUT

Charge

Pump

0.5V

ACIN

OVP

OCP

CHRIN

GATDRV

GND

Thermal

Shutdown

1V

VBAT

OVP

Pin Description