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LY6210248E Datasheet(PDF) 2 Page - Lyontek Inc. |
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LY6210248E Datasheet(HTML) 2 Page - Lyontek Inc. |
2 / 13 page LY6210248 Rev. 0.4 1024K X 8 BIT LOW POWER CMOS SRAM Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 1 ® FEATURES Fast access time : 55/70ns Low power consumption: Operating current : 45/30mA (TYP.) Standby current : 8 μA (TYP.) LL-version Single 4.5V ~ 5.5V power supply All inputs and outputs TTL compatible Fully static operation Tri-state output Data retention voltage : 1.5V (MIN.) Green package available Package : 44-pin 400 mil TSOP-II 48-ball 6mm x 8mm TFBGA GENERAL DESCRIPTION The LY6210248 is a 8,388,608-bit low power CMOS static random access memory organized as 1,048,576 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The LY6210248 is well designed for very low power system applications, and particularly well suited for battery back-up nonvolatile memory application. The LY6210248 operates from a single power supply of 4.5V ~ 5.5V and all inputs and outputs are fully TTL compatible PRODUCT FAMILY Power Dissipation Product Family Operating Temperature Vcc Range Speed Standby(ISB1,TYP.) Operating(Icc,TYP.) LY6210248 0 ~ 70℃ 4.5 ~ 5.5V 55/70ns 8µA(LL) 45/30mA LY6210248(E) -20 ~ 80℃ 4.5 ~ 5.5V 55/70ns 8µA(LL) 45/30mA LY6210248(I) -40 ~ 85℃ 4.5 ~ 5.5V 55/70ns 8µA(LL) 45/30mA FUNCTIONAL BLOCK DIAGRAM DECODER I/O DATA CIRCUIT CONTROL CIRCUIT 1024Kx8 MEMORY ARRAY COLUMN I/O A0-A19 Vcc Vss DQ0-DQ7 CE# WE# OE# CE2 PIN DESCRIPTION SYMBOL DESCRIPTION A0 - A19 Address Inputs DQ0 – DQ7 Data Inputs/Outputs CE#, CE2 Chip Enable Inputs WE# Write Enable Input OE# Output Enable Input VCC Power Supply VSS Ground NC No Connection |
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