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LY616416MV Datasheet(PDF) 6 Page - Lyontek Inc. |
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LY616416MV Datasheet(HTML) 6 Page - Lyontek Inc. |
6 / 13 page LY616416 Rev. 1.1 5V 64K X 16 BIT HIGH SPEED CMOS SRAM Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 5 ® AC TEST CONDITIONS Input Pulse Levels 0.2V to VCC - 0.2V Input Rise and Fall Times 3ns Input and Output Timing Reference Levels 1.5V Output Load CL = 30pF + 1TTL, IOH/IOL = -8mA/16mA AC ELECTRICAL CHARACTERISTICS (1) READ CYCLE LY616416-15 LY616416-20 PARAMETER SYM. MIN. MAX. MIN. MAX. UNIT Read Cycle Time tRC 15 - 20 ns Address Access Time tAA - 15 - 20 ns Chip Enable Access Time tACE - 15 - 20 ns Output Enable Access Time tOE - 7 - 8 ns Chip Enable to Output in Low-Z tCLZ* 4 - 4 ns Output Enable to Output in Low-Z tOLZ* 0 - 0 ns Chip Disable to Output in High-Z tCHZ* - 7 - 8 ns Output Disable to Output in High-Z tOHZ* - 7 - 8 ns Output Hold from Address Change tOH 3 - 3 ns LB#, UB# Access Time tBA - 7 - 8 ns LB#, UB# to High-Z Output tBHZ* - 7 - 8 ns LB#, UB# to Low-Z Output tBLZ* 4 - 4 ns (2) WRITE CYCLE LY616416-15 LY616416-20 PARAMETER SYM. MIN. MAX. MIN. MAX. UNIT Write Cycle Time tWC 15 - 20 - ns Address Valid to End of Write tAW 12 - 16 - ns Chip Enable to End of Write tCW 12 - 16 - ns Address Set-up Time tAS 0 - 0 - ns Write Pulse Width tWP 10 - 11 - ns Write Recovery Time tWR 0 - 0 - ns Data to Write Time Overlap tDW 8 - 9 - ns Data Hold from End of Write Time tDH 0 - 0 - ns Output Active from End of Write tOW* 4 - 5 - ns Write to Output in High-Z tWHZ* - 8 - 9 ns LB#, UB# Valid to End of Write tBW 12 - 16 - ns *These parameters are guaranteed by device characterization, but not production tested. |
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