8 / 85 page
PRELIMINARY
PSoC®5: CY8C52 Family Data Sheet
Document Number: 001-55034 Rev. *A
Page 8 of 85
Figure 2-4 and Figure 2-5 show an example schematic and an
example PCB layout, for the 100-pin TQFP part, for optimal
analog performance on a 2-layer board.
The two pins labeled Vddd must be connected together.
The two pins labeled Vccd must be connected together, and
have capacitors connected between them as shown in
Figure 2-4 and Power System on page 22. The trace between
the two Vccd pins should be as short as possible.
The two pins labeled Vssd must be connected together.
Figure 2-4. Example Schematic for 100-Pin TQFP Part with Power Connections
Vssb
10
Ind
11
Vboost
12
Vbat
13
Vssd
14
XRES
15
Vcca
63
Vssa
64
Vdda
65
Vssd
66
SIO, P12[2]
67
SIO, P12[3]
68
P4[0]
69
P4[1]
70
OA2out, P0[0]
71
OA0out, P0[1]
72
OA0+, P0[2]
73
OA0-, REF0, P0[3]
74
Vddio0
75
P5[0]
16
P5[1]
17
P5[2]
18
P5[3]
19
P1[0], SWIO, TMS
20
P1[1], SWDIO, TCK
21
P1[2]
22
P1[3], SWV, TDO
23
P1[4], TDI
24
P1[5], nTRST
25
P6[7]
9
P2[5]
1
P2[6]
2
P2[7]
3
P12[4], SIO
4
P12[5], SIO
5
P6[4]
6
P6[5]
7
P6[6]
8
OA1out, P3[6]
51
OA3out, P3[7]
52
SIO, P12[0]
53
SIO, P12[1]
54
kHzXout, P15[2]
55
kHzXin, P15[3]
56
NC
57
NC
58
NC
59
NC
60
NC
61
NC
62
U2
CY8C55xx
Vssd
Vdda
Vcca
Vssd
Vssa
Vssa
Vssd
Vssd
Vssd
Vssd
0.1uF
C8
Vssd
Vddd
Vddd
Vddd
Vddd
Vddd
Vssd
1uF
C9
0.1uF
C10
0.1uF
C11
0.1uF
C16
0.1uF
C12
0.1uF
C6
0.1uF
C2
1uF
C15
1uF
C1
Vssd
Vddd
Vssd
Vddd
Vdda
Vssd
Vccd
Vssd
0.1uF
C3
Vssa
Vdda
1uF
C13
[+] Feedback