PRELIMINARY
PSoC®5: CY8C54 Family Data Sheet
Document Number: 001-55036 Rev. *A
Page 10 of 93
Vcca.
Output of analog core regulator and input to analog core.
Requires a 1 µF capacitor to Vssa. Regulator output not for
external use.
Vccd.
Output of digital core regulator and input to digital core.
Requires a capacitor from each Vccd pin to Vssd; see Power
System on page 22. Regulator output not for external use.
Vdda.
Supply for all analog peripherals and analog core
regulator. Vdda must be the highest voltage present on the
device. All other supply pins must be less than or equal to
Vdda.
Vddd.
Supply for all digital peripherals and digital core regulator.
Vddd must be less than or equal to Vdda.
Vssa.
Ground for all analog peripherals.
Vssb.
Ground connection for boost pump.
Vssd.
Ground for all digital logic and I/O pins.
Vddio0, Vddio1, Vddio2, Vddio3.
Supply for I/O pins. See
pinouts for specific I/O pin to Vddio mapping. Vddio must be less
than or equal to Vdda.
XRES (and configurable XRES).
External reset pin. Active low
with internal pullup. In 48-pin SSOP parts, P1[2] is configured as
XRES. In all other parts the pin is configured as a GPIO.
4. CPU
4.1 ARM Cortex-M3 CPU
The CY8C54 family of devices has an ARM Cortex-M3 CPU
core. The Cortex-M3 is a low power 32-bit three-stage pipelined
Harvard architecture CPU that delivers 1.25 DMIPS/MHz. It is
intended for deeply embedded applications that require fast
interrupt handling features.
Figure 4-1. ARM Cortex-M3 Block Diagram
Nested
Vectored
Interrupt
Controller
(NVIC)
Debug Block
(Serial and
JTAG)
Embedded
Trace Module
(ETM)
Trace Port
Interface Unit
(TPIU)
Interrupt Inputs
JTAG/SWD
Trace Pins:
5 for TRACEPORT or
1 for SWV mode
Cortex M3 CPU Core
I- Bus
S-Bus
D-Bus
256 KB
ECC
Flash
Cache
32 KB
SRAM
DMA
AHB Bridge & Bus Matrix
PHUB
GPIO &
EMIF
Prog.
Digital
Prog.
Analog
Special
Functions
Peripherals
AHB Spokes
AHB
AHB
AHB
Bus
Matrix
Cortex M3 Wrapper
C-Bus
Data
Watchpoint and
Trace (DWT)
Instrumentation
Trace Module
(ITM)
Flash Patch
and Breakpoint
(FPB)
Bus
Matrix
32 KB
SRAM
Bus
Matrix
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