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HI-3597 Datasheet(PDF) 3 Page - Holt Integrated Circuits

Part # HI-3597
Description  Octal ARINC 429 Receivers with Label Recognition and SPI Interface
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Manufacturer  HOLTIC [Holt Integrated Circuits]
Direct Link  http://www.holtic.com
Logo HOLTIC - Holt Integrated Circuits

HI-3597 Datasheet(HTML) 3 Page - Holt Integrated Circuits

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HI-3596, HI-3597, HI-3598, HI-3599
HOLT INTEGRATED CIRCUITS
3
PIN DESCRIPTIONS
Table 1. Pin Descriptions
Pin
Function Description
3596 3597 3598 3599
VDD
POWER
3.3V or 5.0V power supply
XXXX
GND
POWER
Chip 0V supply
XXXX
CS
INPUT
Chip select. Data is shifted into SI and out of SO when
CS is low
XXXX
SCK
INPUT
SPI Clock. Data is shifted into or out of the SPI interface
using SCK
XXXX
SI
INPUT
SPI interface serial data input
XXXX
SO
OUTPUT SPI interface serial data output
XXXX
ACLK
INPUT
Master 1 MHz timing reference for the ARINC 429
receiver and transmitter
XXXX
RIN1A* - RIN8A
ARINC
INPUT
ARINC receiver positive input. Direct connection to
ARINC 429 bus
Std
Std
X
Std
RIN1B* - RIN8B
ARINC
INPUT
ARINC receiver negative input. Direct connection to
ARINC 429 bus
Std
Std
X
Std
RIN1A-40* - RIN8A-40
ARINC
INPUT
Alternate ARINC receiver positive input. Requires
external 40KΩ resistor
-40
-40
X
-40
RIN1B-40* - RIN8B-40
ARINC
INPUT
Alternate ARINC receiver negative input. Requires
external 40KΩ resistor
-40
-40
X
-40
FLAG1 - FLAG8
OUTPUT
Goes high when ARINC 429 receiver FIFO is not empty
(CR1=0), or full (CR1=1)
X-X-
FLAG
OUTPUT Logical OR of FLAG1 through FLAG8
XXXX
TX1
OUTPUT ARINC 429 test word ONE state serial output pin
X
X
X
-
TX0
OUTPUT ARINC 429 test word ZERO state serial output pin
X
X
X
-
MR
INPUT
Hardware active high Master Reset. Clears all
receivers and FIFOs. Does not affect Control Register
contents.
X-X-
* NOTE: RIN1A & RIN1B are not available on HI-3597


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