8

9128D–RKE–01/09

ATA5749 [Preliminary]

The PCB loop antenna should not exceed a trace width of 1.5 mm otherwise the Q-factor of the

loop antenna is too high. C4 and C5 should be selected so that the XTO runs on the load reso-

nance frequency of the crystal. A crystal with a load capacitance of 9 pF is recommended for

proper start-up behavior and low current consumption. When determining values for C4 and C5,

a parasitic capacitance of 3 pF should be included. With value of 15 pF for C4 and C5, an effec-

tive load capacitance of 9 pF can be achieved e.g. 9 pF = (15 pF + 3 pF)/2. The supply V

typically delivered from a single Li-Cell.

4.1.1

Antenna Impedance Matching

The maximum output power is achieved by using load impedances according to Table 4-1 and

Table 4-2 on page 9 and the output power. The load impedance Z

ance seen from the ATA5749 ANT1, ANT2 into the matching network. This is not the output

impedance of the IC but essentially the peak voltage divided by the peak current with some addi-

tional parasitic effects (Cpar). Table 4-1 and Table 4-2 do not contain information pertaining to

C3 in Figure 4-2, which is an option for better matching at low power steps.

Figure 4-2 is the circuit that was used to obtain the typical output power measurements in Figure

4-3 on page 10 and typical current consumption in Figure 4-4 on page 10. Table 4-1 and Table

4-2 on page 9 provide recommended values and performance info at various output power lev-

els. For reference, Z

the matching network.

Figure 4-2.

Output Power Measurement Circuit

5

4

Power Meter

ANT1

50

Ω

ANT2

PA

C2

C3

C1

L1

Z

LOPT

VS