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HMN12816D-150 Datasheet(PDF) 8 Page - Hanbit Electronics Co.,Ltd

Part # HMN12816D-150
Description  Non-Volatile SRAM MODULE 2Mbit (128K x 16-Bit), 40pin-Dip, 5V
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Manufacturer  HANBIT [Hanbit Electronics Co.,Ltd]
Direct Link  http://www.hbe.co.kr
Logo HANBIT - Hanbit Electronics Co.,Ltd

HMN12816D-150 Datasheet(HTML) 8 Page - Hanbit Electronics Co.,Ltd

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HANBit
HMN12816D
URL : www.hbe.co.kr
8
HANBit Electronics Co.,Ltd
Rev. 0.0 (April, 2002)
POWER-DOWN/POWER-UP TIMING(tA= 0
OC to 70OC)
PARAMETER
SYMBOL
MIN
TYP.
MAX
UNITS
NOTES
/CEU,/CEL at VIH before
Power-Down
tPD
0
-
-
us
11
VCC Slew from VTP to 0V
tF
300
-
-
us
-
VCC Slew from 0V to VTP
tR
300
-
-
us
-
/CEU,/CEL at VIH after
Power-Up
tREC
2
-
125
us
-
(tA= 25
OC)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Expected Data Retention Time
tDR
10
-
-
years
9
WARNING:
Under no circumstance are negative undershoots, of any amplitude, allowed when device is in battery backup mode.
NOTES:
1. /WE is high for a read cycle.
2. /OE = VIH or VIL . If /OE = VIH during write cycle, the output buffers remain in a high impedance state.
3. tWP is specified as the logical and of /CEU or /CEL and /WE. tWP is measured from the latter of /CEU, /CEL or /WE
going low to the earlier of /CEU, /CEL or /WE going high.
4. tDS is measured from the earlier of /CEU or /CEL or /WE going high.
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the /CEU or /CEL low transition occurs simultaneously with or later than the /WE low transition in the output buffers
remain in a high impedance state during this period.
7. If the /CEU or /CEL high transition occurs prior to or simultaneously with the /WE high transition, the output buffers
remain in high impedance state during this period.
8. If /WE is low or the /WE low transition occurs prior to or simultaneously with the /CEU or /CEL low transition, the
output buffers remain in a high impedance state during this period.
9. Each HMN12816D has a built-in switch that disconnects the lithium source until VCC is first applied by the user.
The expected tDR is defined as accumulative time in the absence of VCC starting from the time power is first applied
by the user.
10. All AC and DC electrical characteristics are valid over the full operating temperature range 0_C to 70_C.
11. In a power down condition the voltage on any pin may not exceed the voltage on Vcc .
12. tWR1, tDH1 are measured from /WE going high.
13. tWR2, tDH2 are measured from /CEU or /CEL going high.


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