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ATA8204P3-TKQY Datasheet(PDF) 11 Page - ATMEL Corporation |
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ATA8204P3-TKQY Datasheet(HTML) 11 Page - ATMEL Corporation |
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11 / 46 page  11 9121B–INDCO–04/09 ATA8203/ATA8204/ATA8205 The clock cycle of some function blocks depends on the selected baud-rate range (BR_Range), which is defined in the OPMODE register. This clock cycle T XClk is defined by the following formulas: BR_Range = BR_Range0: T XClk = 8 × TClk BR_Range1: T XClk = 4 × TClk BR_Range2: T XClk = 2 × TClk BR_Range3: T XClk = 1 × TClk 8. Polling Mode According to Figure 8-1 on page 12, the receiver stays in polling mode in a continuous cycle of three different modes. In sleep mode the signal processing circuitry is disabled for the time period T Sleep while consuming low current of IS =ISoff. During the start-up period, TStartup, all sig- nal processing circuits are enabled and settled. In the following bit-check mode, the incoming data stream is analyzed bit-by-bit and compared with a valid transmitter signal. If no valid signal is present, the receiver is set back to sleep mode after the period T Bit-check. This period varies according to each check as it is a statistical process. An average value for T Bitcheck is given in the electrical characteristics. During T Startup and TBit-check, the current consumption is IS =ISon. The condition of the receiver is indicated on pin IC_ACTIVE. The average current consumption in polling mode is dependent on the duty cycle of the active mode and can be calculated as: During T Sleep and TStartup, the receiver is not sensitive to a transmitter signal. To guarantee the reception of a transmitted command, the transmitter must start the telegram with an adequate preburst. The required length of the preburst depends on the polling parameters T Sleep, TStartup, T Bit-check and the start-up time of a connected microcontroller, TStart_microcontroller. Thus, TBit-check depends on the actual bit rate and the number of bits (N Bit-check) to be tested. The following formula indicates how to calculate the preburst length. T Preburst ≥ TSleep + TStartup + TBit-check + TStart_microcontroller 8.1 Sleep Mode The length of period T Sleep is defined by the 5-bit word Sleep of the OPMODE register, the exten- sion factor X Sleep (according to Table 11-8 on page 27), and the basic clock cycle TClk. It is calculated to be: T Sleep =Sleep × XSleep × 1024 × TClk The maximum value of T Sleep is about 60 ms if XSleep is set to 1. The time resolution is about 2 ms in that case. The sleep time can be extended to almost half a second by setting X Sleep to 8. X Sleep can be set to 8 by bit XSleepStd to “1”. Setting the configuration word Sleep to its maximal value puts the receiver into a permanent sleep mode. The receiver remains in this state until another value for Sleep is programmed into the OPMODE register. This is particularily useful when several devices share a single data line. (It can also be used for microcontroller polling: using pin POLLING/_ON, the receiver can be switched on and off.) I Spoll I Soff T Sleep I Son T Startup T Bit-check + () × + × T Sleep T Startup T Bit-check ++ ---------------------------------------------------------------------------------------------------------------- = |
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