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AT68166F Datasheet(PDF) 11 Page - ATMEL Corporation |
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AT68166F Datasheet(HTML) 11 Page - ATMEL Corporation |
11 / 18 page 11 7747B–AERO–04/09 AT68166F Read Cycle Table 5. Read cycle timings(1) Notes: 1. Timings figures applicable for 8-bit, 16-bit and 32-bit mode. 2. Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 9.) Figure 10. Read Cycle nb 1: Address Controlled (CS = OE = VIL, WE = VIH) Symbol Parameter AT68166F-20 AT68166F-18 Unit min max min max TAVAV Read cycle time 20 - 18 - ns TAVQV Address access time - 20 - 18 ns TAVQX Address valid to low Z 5 - 5 - ns TELQV Chip-select access time - 20 - 18 ns TELQX CS low to low Z(2) 5-5- ns TEHQZ CS high to high Z(2) -9-8 ns TGLQV Output Enable access time - 11 - 8 ns TGLQX OE low to low Z(2) 2-2- ns TGHQZ OE high to high Z (2) -9-8 ns ADDRESS DOUT |
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