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HMF2M64F8VS Datasheet(PDF) 5 Page - Hanbit Electronics Co.,Ltd |
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HMF2M64F8VS Datasheet(HTML) 5 Page - Hanbit Electronics Co.,Ltd |
5 / 13 page HANBit HMF2M64F8VS URL :www.hbe.co.kr HANbit Electronics Co., Ltd. REV.02(August,2002) 5 ERASE AND PROGRAMMING PERFORMANCE LIMITS PARAMETER MIN. TYP. MAX. UNIT COMMENTS Block Erase Time - 0.7 15 sec Chip Erase Time 27 sec Excludes 00H programming prior to erasure Word Programming Time - 11 330 µs Chip Programming Time - 12 36 sec Excludes system-level overhead TSOP CAPACITANCE PARAMETER SYMBOL PARAMETER DESCRIPTION TEST SETUP MIN MAX UNIT CIN Input Capacitance VIN = 0 - 10 pF COUT Output Capacitance VOUT = 0 - 10 pF CIN2 Control Pin Capacitance VIN = 0 - 10 pF Notes : Capacitance is periodically sampled and not 100% tested. TEST SPECIFICATIONS TEST CONDITION VALUE UNIT Output load 1TTL gate Input rise and full times 5 ns Input pulse levels 0 to 3 V Input timing measurement reference levels 1.5 V Output timing measurement reference levels 1.5 V 5.0V Device Under Test 2.7k Ω Diodes = IN3064 or Equivalent 6.2k Ω IN3064 or Equivalent CL Note : CL = 100pF including jig capacitance |
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