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AT86RF230 Datasheet(PDF) 6 Page - ATMEL Corporation |
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AT86RF230 Datasheet(HTML) 6 Page - ATMEL Corporation |
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6 / 98 page  6 5131E-MCU Wireless-02/09 AT86RF230 In receive mode, the RF input provides a low-impedance path to ground when transistor M0 (see Figure 4-1) pulls the inductor center tap to ground. A DC voltage drop of 20 mV across the on-chip inductor can be measured at the RF pins. In transmit mode, a control loop provides a common-mode voltage of 0.9V. Transistor M0 is off, allowing the PA to set the common-mode voltage. The common-mode capacitance at each pin to ground shall be < 30 pF to ensure the stability of this common-mode feedback loop. XTAL1, XTAL2 The pin XTAL1 is the input of the reference oscillator amplifier (XOSC), XTAL2 is the output. A detailed description of the crystal oscillator setup and the related XTAL1/XTAL2 pin configuration can be found in section 9.6. When using an external clock reference signal, XTAL1 shall be used as input pin. For further details refer to section 9.6.3. Table 4-2. Comments on Analog and RF Pins Pin Condition Recommendation/Comment RFP/RFN VDC = 0.9V (TX) VDC = 20 mV (RX) at both pins AC-coupling is required if an antenna with a DC path to ground is used. Serial capacitance must be < 30 pF. XTAL1/XTAL2 CPAR = 3 pF VDC = 0.9V at both pins Parasitic capacitance (CPAR) of the pins must be considered as additional load capacitance to the crystal. 4.3 Digital Pins The digital interface of the AT86RF230 compromises pins SEL , SCLK, MOSI and MISO forming the serial peripheral interface (SPI) and pins CLKM, IRQ, SLP_TR and RST used as additional control signal between radio transceiver and microcontroller. The digital radio transceiver interface is described in detail in section 6. 4.3.1 Driver Strength Settings of Digital Output Pins The driver strength of the digital output pins (MISO, IRQ) and CLKM pin can be configured by register 0x03 (TRX_CTRL_0) as described in Table 4-3. The capacitive load should be as small as possible and not larger than 50 pF when using the 2 mA minimum driver strength setting. Generally, the output driver strength should be adjusted to the lowest possible value in order to keep the current consumption and the emission of digital signal harmonics low. Table 4-3. Digital Output Driver Configuration Pin Default Driver Strength Comment MISO, IRQ 2 mA Adjustable to 2 mA, 4 mA, 6 mA and 8 mA CLKM 4 mA Adjustable to 2 mA, 4 mA, 6 mA and 8 mA |
Similar Part No. - AT86RF230_09 |
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Similar Description - AT86RF230_09 |
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