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AT32UC3A1256-AUT Datasheet(PDF) 5 Page - ATMEL Corporation |
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AT32UC3A1256-AUT Datasheet(HTML) 5 Page - ATMEL Corporation |
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5 / 826 page  5 32058H–AVR32–03/09 AT32UC3A 4. Blockdiagram Figure 4-1. Blockdiagram UC CPU NEXUS CLASS 2+ OC D IN S TR IN TE R FAC E DATA IN TE R FAC E TIM E R /CO UNTER IN TE RRUPT CO NTRO LLE R REAL TIM E CO UNTER PERIPHERAL DM A CO NTRO LLER 512 K B FLA SH H S B-PB B R ID G E B HSB-PB BRID G E A S MM M M M S S S S S M EXTE RNAL IN TERRUPT CO NTRO LLER HIG H SPEED BUS M A TR IX FAST G P IO 64 KB SRAM PA PB PC PX A [2..0] B[2..0] CLK[2..0] EXTIN T[7..0] K P S[7..0] NMI_N GCLK [3..0] XIN 32 XO UT32 XIN0 XO U T0 PA PB PC PX RESET_N CAS RAS SD A10 SD CK SDC K E SD CS0 SD W E NC S [3..0] NRD NW AIT NW E 0 D A TA [15..0] USB IN TER FA C E DM A ID VBO F VBU S D- D+ ETHERNET MAC DM A 32 K H z OS C 115 kH z RCO SC OS C 0 P LL0 PULS E W IDTH M O DULATIO N CO NTRO LLE R SERIAL PE R IP H ER A L IN TE RFACE 0/1 TW O -W IR E IN TE R FAC E M ISO , M O SI NP C S [3..1] P W M [6..0] SC L SD A USAR T1 RX D TX D CLK RTS , CTS D S R, DTR, D CD , RI USAR T0 USAR T2 USAR T3 RX D TX D CLK RTS , CTS SYNCHRO NO US SERIAL CO NTRO LLE R TX _C LO C K , TX _FRA M E _S Y N C RX _D A TA TX_D ATA RX _C LO C K , R X _FRA M E _S Y N C A N ALOG TO DIG ITA L CO NVERTE R A D[7..0] AD VREF W A TCHDO G TIM E R XIN1 XO U T1 OS C 1 P LL1 SC K JTA G IN TER FA C E MCK O M D O [5..0] M S E O [1..0] EVTI_N EVTO_N TC K TDO TD I TM S PO W E R MAN A G E R RESET CO NTRO LLER A DD R[23..0] SLEEP CO NTRO LLER CLO C K CO NTRO LLER CLO C K G E NERATO R CO L, CR S, RX D[3..0], R X_CLK , RX _DV , RX_E R MDC , TX D [3..0], TX _C LK, TX _E N , TX _E R , SPEED MDIO C O N FIG U RATIO N REG ISTER S BUS M E M O RY PRO TEC TIO N U NIT PB PB HS B HS B NW E 1 NW E 3 NPC S0 LO C A L BU S INTE RFA CE AUDIO B ITSTR E AM DAC DA TA [1..0] DA TA N[1..0] |
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