IDT6P30006A

CLOCK DISTRIBUTION CIRCUIT

DISTRIBUTION CIRCUITS

IDT™ CLOCK DISTRIBUTION CIRCUIT

5

IDT6P30006A REV C 111009

The IDT6P30006A is a slave-only device that supports block read and block write protocol using a single 7 bit address and

In applications where the indexed block write and block read

are used, the dummy byte (bit 11-18) functions as a

register-offset (8 bits) pointer.

Byte 0: Control Register

A6

A5

A4

A3

A2

A1

A0

R/W#

1101001

X

Bit

Description

Type

Power Up

Condition

Output(s) Affected

Notes

7

Reserved

RW

Undefined

Not applicable

6

Reserved

RW

Undefined

Not applicable

5

Reserved

RW

Undefined

Not applicable

4

Reserved

RW

Undefined

Not applicable

3

OE for clock output

RW

1

Output_5 clock output

1=enabled

0=disabled

2

OE for clock output

RW

1

Output_6 clock output

1=enabled

0=disabled

1

OE for clock output

RW

1

Output_7 clock output

1=enabled

0=disabled

0

OE for clock output

RW

1

Output_8 clock output

1=enabled

0=disabled