8512061AGILFT datasheet(6/17 Pages) IDT

Part #	8512061AGILFT

Description	SINGLE CHANNEL 0.7V DIFFERENTIALTO-LVTTL TRANSCEIVER

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Manufacturer	IDT [Integrated Device Technology]

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ICS8512061I

SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER

IDT™ / ICS™ TRANSCEIVER

6

ICS8512061AGI REV. B NOVEMBER 19, 2008

Additive Phase Jitter (LVCMOS)

The spectral purity in a band at a specific offset from the

fundamental compared to the power of the fundamental is called

the dBc Phase Noise. This value is normally expressed using a

Phase noise plot and is most often the specified plot in many

applications. Phase noise is defined as the ratio of the noise power

present in a 1Hz band at a specified offset from the fundamental

frequency to the power value of the fundamental. This ratio is

expressed in decibels (dBm) or a ratio of the power in the 1Hz band

to the power in the fundamental. When the required offset is

specified, the phase noise is called a dBc value, which simply

means dBm at a specified offset from the fundamental. By

investigating jitter in the frequency domain, we get a better

understanding of its effects on the desired application over the

entire time record of the signal. It is mathematically possible to

calculate an expected bit error rate given a phase noise plot.

As with most timing specifications, phase noise measurements

has issues relating to the limitations of the equipment. Often the

noise floor of the equipment is higher than the noise floor of the

device. This is illustrated above. The device meets the noise floor

of what is shown, but can actually be lower. The phase noise is

dependent on the input source and measurement equipment.

Additive Phase Jitter @ 100MHz

12kHz to 20MHz = 0.23ps (typical)

Offset from Carrier Frequency (Hz)

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