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8512061AGILF Datasheet(PDF) 4 Page - Integrated Device Technology |
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8512061AGILF Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 17 page ICS8512061I SINGLE CHANNEL 0.7V DIFFERENTIAL-TO-LVTTL TRANSCEIVER IDT™ / ICS™ TRANSCEIVER 4 ICS8512061AGI REV. B NOVEMBER 19, 2008 Table 4B. HCSL (QA/nQA) AC Characteristics, VDD = 3.3V ± 0.3V, TA = -40°C to 85°C NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium has been reached under these conditions. NOTE 1: Measured from VDD/2 input cross point to the differential output crossing point. NOTE 2: Measurement taken from differential waveform. NOTE 3: Measurement from -150mV to +150mV on the differential waveform (derived from QA minus nQA). The signal must be monotonic through the measurement region for rise and fall time. The 300mV measurement window is centered on the differential zero crossing. NOTE 4: TSTABLE is the time the differential clock must maintain a minimum ±150mV differential voltage after rising/falling edges before it is allowed to drop back into the VRB ±100 differential range. See Parameter Measurement Information Section. NOTE 5: Measurement taken from single-ended waveform. NOTE 6: Defined as the maximum instantaneous voltage including overshoot. See Parameter Measurement Information Section. NOTE 7: Defined as the minimum instantaneous voltage including undershoot. See Parameter Measurement Information Section. NOTE 8: Measured at crossing point where the instantaneous voltage value of the rising edge of QA equals the Falling edge of nQA. See Parameter Measurement Information Section NOTE 9: Refers to the total variation from the lowest crossing point to the highest, regardless of which edge is crossing. Refers to all crossing points for this measurement. See Parameter Measurement Information Section. NOTE 10: Defined as the total variation of all crossing voltage of Rising QA and Falling nQA. This is the maximum allowed variance in the VCROSS for any particular system. See Parameter Measurement Information Section. NOTE 11: Input duty cycle must be 50%. Parameter Symbol Test Conditions Minimum Typical Maximum Units fMAX Output Frequency 250 MHz tjit Buffer Additive Phase Jitter, RMS 100MHz, Integration Range: 12kHz – 20MHz 0.29 ps tPD Propagation Delay, NOTE 1 IN to QA/nQA 1.1 1.7 ns Rise Edge Rate Rising Edge Rate; NOTE 2, 3 0.6 4.0 V/ns Fall Edge Rate Falling Edge Rate; NOTE 2, 3 0.6 4.0 V/ns Vrb Ringback Voltage; NOTE 2, 4 -100 100 V VMAX Absolute Max Output Voltage; NOTE 5, 6 1150 mV VMIN Absolute Min Output Voltage; NOTE 5, 7 -300 mV VCROSS Absolute Crossing Voltage; NOTE 5, 8, 9 250 550 mV ∆V CROSS Total Variation of VCROSS over all edges; NOTE 5, 8, 10 140 mV odc Output Duty Cycle; NOTE 11 45 55 % |
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