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843SDNAGLFT Datasheet(PDF) 10 Page - Integrated Device Technology |
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843SDNAGLFT Datasheet(HTML) 10 Page - Integrated Device Technology |
10 / 14 page ICS843SDN FEMTOCLOCK™CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR IDT™ / ICS™ 3.3V LVPECL CLOCK GENERATOR 10 ICS843SDNAG REV. A FEBRUARY 19, 2009 Power Considerations This section provides information on power dissipation and junction temperature for the ICS843SDN. Equations and example calculations are also provided. 1. Power Dissipation. The total power dissipation for the ICS843SDN is the sum of the core power plus the power dissipated in the load(s). The following is the power dissipation for VCC = 3.3V + 5% = 3.465V, which gives worst case results. NOTE: Please refer to Section 3 for details on calculating power dissipated in the load. • Power (core)MAX = VCC_MAX * IEE_MAX = 3.465V * 83mA = 287.60mW • Power (outputs)MAX = 30mW/Loaded Output pair Total Power_MAX (3.3V, with all outputs switching) = 287.60mW + 30mW = 317.60mW 2. Junction Temperature. Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device. The maximum recommended junction temperature for HiPerClockS devices is 125°C. The equation for Tj is as follows: Tj = θ JA * Pd_total + TA Tj = Junction Temperature θ JA = Junction-to-Ambient Thermal Resistance Pd_total = Total Device Power Dissipation (example calculation is in section 1 above) TA = Ambient Temperature In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ JA must be used. Assuming no air flow and a multi-layer board, the appropriate value is 129.5°C/W per Table 7 below. Therefore, Tj for an ambient temperature of 70°C with all outputs switching is: 70°C + 0.318W * 129.5°C/W = 111.2°C. This is below the limit of 125°C. This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of board (multi-layer). Table 7. Thermal Resistance θJA for 8 Lead TSSOP, Forced Convection θ JA by Velocity Meters per Second 01 2.5 Multi-Layer PCB, JEDEC Standard Test Boards 129.5°C/W 125.5°C/W 123.5°C/W |
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