7

COMMERCIALTEMPERATURERANGE

IDT72V81/72V82/72V83/72V84/72V85 3.3V CMOS DUAL ASYNCHRONOUS FIFO

512 x 9, 1024 x 9, 2048 x 9, 4096 x 9, 8192 x 9

FEBRUARY 5, 2009

Figure 9. Half-Full Flag Timing

Figure 10. Expansion Out

Figure 11. Expansion In

OPERATINGMODES:

Care must be taken to assure that the appropriate flag is monitored by each

system (i.e.

FFismonitoredonthedevicewhere Wisused;EFismonitoredon

the device where

R is used).

Single Device Mode

A single IDT72V81/72V82/72V83/72V84/72V85 may be used when the

application requirements are for 512/1,024/2,048/4,096/8,192 words or less.

These FIFOs are in a Single Device Configuration when the Expansion In (

XI)

control input is grounded (see Figure 12).

Depth Expansion

These devices can easily be adapted to applications when the requirements

are for greater than 512/1,024/2,048/4,096/8,192 words. Figure 14 demon-

strates a four-FIFO Depth Expansion using two IDT72V81/72V82/72V83/

72V84/72V85s. Any depth can be attained by adding additional IDT72V81/

72V82/72V83/72V84/72V85s. These FIFOs operate in the Depth Expansion

mode when the following conditions are met:

1. ThefirstFIFOmustbedesignatedbygroundingtheFirstLoad(

FL)control

input.

2. All other FIFOs must have

FLin the high state.

3. The Expansion Out (

XO)pinofeachdevicemustbetiedtotheExpansion

In (

XI) pin of the next device. See Figure 14.

4. ExternallogicisneededtogenerateacompositeFullFlag(

FF)andEmpty

Flag (

EF). This requires the ORing of all EFs and ORing of all FFs (i.e. all

must be set to generate the correct composite

FFor EF). See Figure 14.

5. The Retransmit (

RT) function and Half-Full Flag (HF) are not available in

the Depth Expansion Mode.

W

XI

R

WRITE TO

FIRST PHYSICAL

LOCATION

READ FROM

FIRST PHYSICAL

LOCATION

3966 drw 13

R

W

XO

3966 drw 12

WRITE TO

LAST PHYSICAL

LOCATION

READ FROM

LAST PHYSICAL

LOCATION

R

W

HF

3966 drw 11

HALF-FULL OR LESS

MORE THAN HALF-FULL

HALF-FULL OR LESS