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9UMS9633BFW3LFT Datasheet(PDF) 1 Page - Integrated Device Technology |
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9UMS9633BFW3LFT Datasheet(HTML) 1 Page - Integrated Device Technology |
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1 / 18 page  ICS9UMS9633BW IDTTM/ICSTM Ultra Mobile PC Clock for Automotive use 1425A—09/02/09 Datasheet ULTRA MOBILE PC CLOCK FOR AUTOMOTIVE USE 1 Recommended Application: Features/Benefits: Poulsbo Based Ultra-Mobile PC (UMPC) for Automotive Use • AEC Q100 compliant • Supports ULV CPUs with 67 to 167 MHz CPU outputs • Dedicated TEST/SEL and TEST/MODE pins saves isolation resistors on pins • CPU STOP# input for power manangment • Fully integrated Vreg • Integrated series resistors on differential outputs • 1.5V VDD IO operation, 3.3V VDD core and REF supply pin for REF • -40 to +85C operating range SSOP Pin Configuration Output Features: • 3 - CPU low power differential push-pull pairs • 3 - SRC low power differential push-pull pairs • 1 - LCD100 SSCD low power differential push-pull pair • 1 - DOT96 low power differential push-pull pair • 1 - REF, 14.31818MHz, 3.3V SE output REF 1 48 VDDREF_3.3 GNDREF 247 X1 VDDCORE_3.3 346 X2 FSC_L 445 CLKPWRGD#/PD_3.3 TEST_MODE 544 CPU_STOP# TEST_SEL 643 CPUT0_LPR SCLK 742 CPUC0_LPR SDATA 8 41 VDDIO_1.5 VDDCORE_3.3 940 GNDCPU VDDIO_1.5 10 39 CPUT1_LPR DOT96C_LPR 11 38 CPUC1_LPR DOT96T_LPR 12 37 VDDCORE_3.3 GNDDOT 13 36 VDDIO_1.5 GNDLCD 14 35 GNDCPU LCD100C_LPR 15 34 CPUT2_LPR LCD100T_LPR 16 33 CPUC2_LPR VDDIO_1.5 17 32 FSB_L VDDCORE_3.3 18 31 *CR#2 *CR#0 19 30 SRCT2_LPR GNDSRC 20 29 SRCC2_LPR SRCC0_LPR 21 28 GNDSRC SRCT0_LPR 22 27 SRCT1_LPR *CR#1 23 26 SRCC1_LPR VDDCORE_3.3 24 25 VDDIO_1.5 * indicates inputs with internal pull up of ~10Kohm to 3.3V 48 SSOP Package |
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