5041 series

SEIKO NPC CORPORATION—2

SERIES CONFIGURATION

TEMPERATURE ADJUSTMENT FUNCTION GAIN SETTING RATIO

Temperature adjustment function gain setting ratio of 5041A

×A and 5041A×B differs. In the case of tempera-

5041A

×B is designed twice as higher than that of 5041A×A based on non-compensation temperature deviation

in same register value setting.

VERSION NAME

Pad layout

Recommended

oscillation

[MHz]

*1. The recommended oscillation frequency is a yardstick value derived from the crystal used for NPC characteristics authentication. However, the oscilla-

tion frequency range is not guaranteed. Specifically, the characteristics can vary greatly due to crystal characteristics and mounting conditions, so the

oscillation characteristics of components must be carefully evaluated.

Operating

supply

voltage range

[V]

Temperature

adjustment

function gain

*2. Values in parentheses ( ) are provisional only.

*3. Versions in parentheses ( ) are under development.

for flip chip

bonding

20 to 55

2.25 to 3.63

1

5041A1A

5041A2A

5041A3A

5041A4A

5041A5A

5041A6A

2

5041A1B

5041A2B

5041A3B

5041A4B

5041A5B

5041A6B

1.60 to 2.25

(1)

(5041B1A)

(5041B2A)

(5041B3A)

(5041B4A)

(5041B5A)

(5041B6A)

Device

Package

Version name

WF5041

×××−4

Wafer form

Ta [

°C]

Temperature deviation

at non-compensation

<Gain setting ratio>

5041A

×A : 5041A×B

1 : 2

5041A

×A

5041A

×B

Form WF: Wafer form

WF5041

−4

Frequency divider function (output frequency)

Temperature adjustment function gain setting ratio

Operating supply voltage