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SN75DP120RHHT Datasheet(PDF) 7 Page - Texas Instruments |
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SN75DP120RHHT Datasheet(HTML) 7 Page - Texas Instruments |
7 / 27 page SN75DP120 www.ti.com SLLSE08 – OCTOBER 2009 Table 2. Transition Between Operational Modes (continued) MODE TRANSITION USE CASE TRANSITION SPECIFICS Output Disable Mode DPCD register values correct to a valid register 1. Appropriate mode is re-entered → Any State entry ORDERING INFORMATION(1) PART NUMBER PART MARKING PACKAGE SN75DP120RHHR DP120 36-pin QFN reel (large) SN75DP120RHHT DP120 36-pin QFN reel (small) (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) VALUE / UNIT Supply voltage range(2) VDD –0.3 V to 4.0 V Supply voltage range VCC –0.3 V to 4.0 V Main Link I/O (INx, OUTx) –0.3 V to VCC + 0.3 V Main Link I/O (INx, OUTx) differential voltage 1.5V HPD_SINK and CAD_SINK –0.3 V to 5.5 V Voltage range HPD_SRC and CAD_SRC –0.3 V to VCC + 0.3 V Auxiliary (AUX_IN) –0.3 V to 5.5 V Control pins –0.3 V to 4.0 V Human body model(3) 11 kV Electrostatic discharge Charged-device model(4) ±1500 V Machine model(5) ±200 V Continuous power dissipation See Dissipation Rating Table (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, except differential voltages, are with respect to network ground terminal. (3) Tested in accordance with JEDEC Standard 22, Test Method A114-E (4) Tested in accordance with JEDEC Standard 22, Test Method C101-D (5) Tested in accordance with JEDEC Standard 22, Test Method A115-A DISSIPATION RATINGS DERATING FACTOR (1) TA = 85°C PACKAGE PCB JEDEC STANDARD TA ≤ 25°C ABOVE TA = 25°C POWER RATING Low-K 1250 mW 12.5 mW/°C 500 mW 36-pin QFN (RHH) High-K 3095 mW 30.95 mW/°C 1238 mW (1) This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): SN75DP120 |
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