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DS1842A Datasheet(PDF) 2 Page - Maxim Integrated Products

Part # DS1842A
Description  76V, APD, Bias Output Stage with Current Monitoring
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS1842A Datasheet(HTML) 2 Page - Maxim Integrated Products

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76V, APD, Bias Output Stage with
Current Monitoring
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(TA = -40°C to +85°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Note 1: Rising MIROUT transition from 10µA to 1mA; VMIRIN = 40V, 2.5k
Ω load.
Note 2: Not production tested. Guaranteed by design.
Voltage Range on GATE and CLAMP
Relative to GND...................................................-0.3V to +12V
Voltage Range on MIRIN, MIROUT, FBIN
MIR1, and MIR2 Relative to GND........................-0.3V to +80V
Voltage Range on FBOUT Relative to GND ..........-0.3V to +6.0V
Voltage Range on LX Relative to GND...................-0.3V to +85V
Operating Junction Temperature Range ...........-40°C to +150°C
Storage Temperature Range .............................-55°C to +135°C
Soldering Temperature ..........................Refer to the IPC JEDEC
J-STD-020 Specification.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Switching Frequency
fSW
0
1.2
MHz
CGATE
VGS = 0V, VDS = 25V
40
FET Capacitance
CLX
fSW = 1MHz
90
pF
FET Gate Resistance
RG
22
VGS = 3V, ID = 170mA
1
2
FET On-Resistance
RDSON
VGS = 10V, ID = 170mA
0.75
1.4
GATE Voltage
VGS
0
11
V
Switching Current
ILX
Duty cycle = 10%, fSW = 100kHz
680
mA
LX Voltage
VLX
80
V
LX Leakage
IIL(LX)
VGATE = 0V, VLX = 76V
-1
+1
μA
CLAMP Voltage
VCLAMP
0
11
V
CLAMP Threshold
VCLT
1.25
1.8
2.35
V
CLAMP = low
1.8
2.75
3.85
mA
Maximum MIROUT Current
IMIROUT
CLAMP = high
10
μA
MIR1 to MIROUT Ratio
KMIR1
15V < VMIRIN < 76V, IMIROUT > 1μA
0.096
0.100
0.104
A/A
MIR2 to MIROUT Ratio
KMIR2
15V < VMIRIN < 76V, IMIROUT > 1μA
0.192
0.200
0.208
A/A
MIR1, MIR2 Rise Time
(20%/80%)
tRC
(Note 1)
30
ns
Shutdown Temperature
TSHDN
(Note 2)
+150
°C
Hysteresis Temperature
THYS
(Note 2)
5
°C
Leakage on GATE and CLAMP
IIL
-1
+1
μA
Resistor-Divider Ratio (R1/R2)
KR
TA = +25°C, VFBIN = 76V
59.5
60.25
Resistor-Divider Tempco
±50
ppm/°C
Resistor-Divider End-to-End
Resistance
RRES
TA = +25°C, VFBIN = 76V
308
385
481
k


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