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DS1342 Datasheet(PDF) 3 Page - Maxim Integrated Products |
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DS1342 Datasheet(HTML) 3 Page - Maxim Integrated Products |
3 / 14 page Low-Current I2C RTCs for High-ESR Crystals 3 AC ELECTRICAL CHARACTERISTICS (VCC = +1.8V to +5.5V, TA = -40NC to +85NC, unless otherwise noted.) (Note 2, Figure 1) CRYSTAL PARAMETERS Note 2: Limits at -40NC are guaranteed by design and not production tested. Note 3: Voltage referenced to ground. Note 4: Specified with I2C bus inactive. Oscillator operational, INTCN = 1, ECLK = 0. Note 5: Applies to CLKIN/INTA and SQW/INTB only. Note 6: The minimum SCL clock frequency is limited by the bus timeout feature, which resets the serial bus interface if SCL is held low for tTIMEOUT. Note 7: After this period, the first clock pulse is generated. Note 8: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the VIHMIN of the SCL sig- nal) to bridge the undefined region of the falling edge of SCL. Note 9: The maximum tHD:DAT need only be met if the device does not stretch the low period (tLOW) of the SCL signal. Note 10: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT R to 250ns must then be met. This is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the low period of the SCL signal, it must output the next data bit to the SDA line tRMAX + tSU:DAT = 1000 + 250 = 1250ns before the SCL line is released. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SCL Clock Frequency fSCL (Note 6) 400 kHz Bus Free Time Between a STOP and START Condition tBUF 1.3 F s Hold Time (Repeated) START Condition tHD:STA (Note 7) 0.6 F s Low Period of SCL Clock tLOW 1.3 F s High Period of SCL Clock tHIGH 0.6 F s Data Hold Time tHD:DAT (Notes 8, 9) 0 0.9 F s Data Setup Time tSU:DAT (Note 10) 100 ns Setup Time for a Repeated START Condition tSU:STA 0.6 F s Rise Time of Both SDA and SCL Signals tR (Note 11) 20 + 0.1CB 300 ns Fall Time for Both SDA and SCL Signals tF (Note 11) 20 + 0.1CB 300 ns Setup Time for STOP Condition tSU:STO 0.6 F s Capacitive Load for Each Bus Line CB (Note 11) 400 pF I/O Capacitance CI/O 10 pF SCL Spike Suppression tSP 30 ns Oscillator Stop Flag (OSF) Delay tOSF (Note 12) 25 100 ms Timeout Interval tTIMEOUT (Note 13) 25 35 ms PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Nominal Frequency fO 32.768 kHz Series Resistance ESR 35 80 kI Load Capacitance CL DS1341 6 pF DS1342 12.5 |
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