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MC56F8365 Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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MC56F8365 Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
6 / 180 page 56F8365 Technical Data, Rev. 8 6 Freescale Semiconductor Preliminary • Four internal data buses • Instruction set supports both DSP and controller functions • Controller-style addressing modes and instructions for compact code • Efficient C compiler and local variable support • Software subroutine and interrupt stack with depth limited only by memory • JTAG/EOnCE debug programming interface 1.1.2 Differences Between Devices Table 1-1 outlines the key differences between the 56F8365 and 56F8165 devices. 1.1.3 Memory Note: Features in italics are NOT available in the 56F8165 device. • Harvard architecture permits as many as three simultaneous accesses to program and data memory • Flash security protection feature • On-chip memory, including a low-cost, high-volume Flash solution — 512KB of Program Flash — 4KB of Program RAM — 32KB of Data Flash — 32KB of Data RAM — 32KB of Boot Flash • EEPROM emulation capability 1.1.4 Peripheral Circuits Note: Features in italics are NOT available in the 56F8165 device. • Pulse Width Modulator module: Table 1-1 Device Differences Feature 56F8365 56F8165 Guaranteed Speed 60MHz/60 MIPS 40MHz/40MIPS Program RAM 4KB Not Available Data Flash 32KB Not Available PWM 2 x 6 1 x 6 CAN 2 Not Available Quad Timer 4 2 Quadrature Decoder 2 x 4 1 x 4 Temperature Sensor 1 Not Available |
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Similar Description - MC56F8365 |
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